mirror of https://github.com/efabless/caravel.git
c1e0d5ba06
update gpio_control_block config for new openlane versions: - disable `SYNTH_BUFFERING` and `SYNTH_SIZING` to limit the design size and fit the floorplan - change `SYNTH_STRATEGY` to `AREA 0` to minimize design cells - disable `PL_RESIZER_TIMING_OPTIMIZATIONS` and enable `GLB_RESIZER_TIMING_OPTIMIZATIONS` - remove `FP_IO_*` and replace them with `FP_DEF_TEMPLATE` for io placement - set `DECAP_CELL` to not use ef decaps.. i think that was for simulations? - enable some turned off `QUIT_*` variables - replace deprecated variables such as `GLB_RT_*` - customize `pdn.tcl` to force pdn straps to follow the old pattern - replace `$script_dir` with `$::env(DESIGN_DIR)` !IMPORTANT - still need to run dynamic simulations |
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|---|---|---|
| .. | ||
| caravan | ||
| caravel | ||
| caravel_clocking | ||
| chip_io | ||
| chip_io_alt | ||
| digital_pll | ||
| gpio_control_block | ||
| gpio_defaults_block | ||
| gpio_logic_high | ||
| housekeeping | ||
| mgmt_protect | ||
| mprj2_logic_high | ||
| mprj_logic_high | ||
| spare_logic_block | ||
| user_analog_project_wrapper | ||
| user_id_programming | ||
| user_project_wrapper | ||
| .gitignore | ||
| Makefile | ||
| README.rst | ||
| README.src.rst | ||
| chip_dimensions.txt | ||
| openlane.md | ||
README.src.rst
.. raw:: html <!--- # SPDX-FileCopyrightText: 2020 Efabless Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. # You may obtain a copy of the License at # # http://www.apache.org/licenses/LICENSE-2.0 # # Unless required by applicable law or agreed to in writing, software # distributed under the License is distributed on an "AS IS" BASIS, # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. # # SPDX-License-Identifier: Apache-2.0 --> .. include:: ../docs/source/caravel-with-openlane.rst