Commit Graph

65 Commits

Author SHA1 Message Date
tangxifan 5dfb3e6cb0 [doc] added an example about how to call vpr 2022-12-30 18:43:01 -08:00
tangxifan 492b8a153a [doc] add documentation about vpr commands 2022-12-30 18:16:00 -08:00
tangxifan 70b0d2e505 [doc] update pin table file format for pin direction keywords 2022-10-17 15:32:00 -07:00
tangxifan aef94171c2 [doc] update options for pcf2place command 2022-10-17 13:55:18 -07:00
tangxifan 58487c7766 [doc] add more notes about the commmand ``pb_pin_fixup`` 2022-09-29 11:01:07 -07:00
tangxifan 48f776d49b [doc] update documentation about the new option 2022-09-12 16:58:32 -07:00
tangxifan 50813d90a2 [doc] update documentation based on the actual implementation on rr_gsb writer 2022-08-29 20:45:31 -07:00
tangxifan 12a30196e0 [engine] updating gsb writer; Unfinished!!! 2022-08-29 16:58:48 -07:00
tangxifan adbc69f081 [doc] add new options for GSB writer 2022-08-29 14:16:51 -07:00
tangxifan 84dbcd61dd [doc] fixed a few typo and format errors 2022-07-28 19:09:53 -07:00
tangxifan c16bcd7f63 [doc] add file formates required by pcf2place 2022-07-28 16:35:13 -07:00
tangxifan 860591ff3f [doc] add pcf file format to documentation 2022-07-28 16:15:44 -07:00
tangxifan 6e5fde56ce [doc] add pcf2place to command list 2022-07-28 16:06:57 -07:00
tangxifan bf2b1da801 [doc] add the new command file format to documentation 2022-07-26 14:06:07 -07:00
tangxifan 8116141210 [Doc] Update documentation on the bus group feature 2022-02-18 15:46:25 -08:00
tangxifan 37d8617a5c [Doc] Update due to new options 2022-02-17 19:45:37 -08:00
tangxifan 2b5fded2a9 [Doc] Update documentation on the new option 2022-02-01 13:25:58 -08:00
tangxifan b7b0a2a5d8 [Doc] Update doc about the new option 2022-02-01 12:19:26 -08:00
tangxifan 63f44adf15 [FPGA-Verilog] Now have a new option ``--use_relative_path`` 2022-01-31 12:48:05 -08:00
tangxifan a9a56686e2 [Engine] Add a new option ``--unique`` to command ``write_gsb_to_xml`` 2022-01-26 11:10:29 -08:00
tangxifan 25143d07f1 [FPGA-Bitstream] Now has a new option ``--no_time_stamp`` to all the commands that output bitstream files 2022-01-25 13:37:54 -08:00
tangxifan 62b57b05d2 [Engine] Now FPGA-Verilog commands have a new option ``--no_time_stamp`` 2022-01-25 12:09:08 -08:00
tangxifan 03bcf6dee5 [Doc] Update documenation for the new option ``--keep_dont_care_bits`` 2021-10-05 19:23:42 -07:00
tangxifan ac9046b7d2 [Doc] Remove ``define_simulation.v`` since it is no longer needed. 2021-06-29 15:38:35 -06:00
tangxifan 30027b8c15 [Doc] Update doc to deprecate anything related to '--support_icarus_simulator' and '--include_signal_init' 2021-06-25 15:27:15 -06:00
tangxifan 11d0283771 [Doc] Remove option '--support_icarus_simulator'. Add option '--embed_bitstream' 2021-06-25 15:11:12 -06:00
tangxifan 507f5ee54c [Doc] Update documentation about time unit support in writing simulation file 2021-06-25 10:34:43 -06:00
tangxifan 8e2ba718d0 [Doc] update documentation on the new option '--testbench_type' 2021-06-25 10:16:48 -06:00
tangxifan 779437cd37 [Doc] Update documentation to remove out-of-date options related to signal_init 2021-06-24 17:07:15 -06:00
tangxifan 9585e1d3b5 [Doc] Update documentation about 'default_net_type' option in testbench generators 2021-06-14 14:00:34 -06:00
tangxifan b719419931 [Doc] Update documentation on the FPGA-Verilog commands in openfpga shell; Deprecated the 'write_verilog_testbench' command 2021-06-09 16:59:02 -06:00
tangxifan c30be6e95e [Doc] Update documentation about the fast configuration for write bitstream command 2021-06-04 20:00:28 -06:00
tangxifan 059e74b4ef [Doc] Add --fast configuration option to documentation for 'write_full_testbench' 2021-06-04 15:17:00 -06:00
tangxifan 9bcaa820ae [Doc] Update documentation for the new command 'write_full_testbench' 2021-06-03 16:18:07 -06:00
tangxifan 24f83f0058 [Doc] Update documentation about the new command 'report_bitstream_distribution' 2021-05-07 11:54:33 -06:00
tangxifan 1bae59dc6a [Doc] Update documentation for the write_io_mapping command 2021-04-27 14:54:57 -06:00
tangxifan c638e5bde5 [Doc] Update documentation for default net type option 2021-02-28 12:00:55 -07:00
tangxifan d83158654c [Doc] Add a draft documentation about the bitstream setting 2021-02-01 22:33:17 -07:00
tangxifan 0e16638dc2 [Doc] Update documentation about the changes on activity files 2021-01-29 11:49:07 -07:00
tangxifan 78ad9cd000 [Doc] Add version command/option to documentation 2021-01-27 16:06:45 -07:00
tangxifan 9fefe1502f [Doc] Typo fix on write_fabric_key option 2021-01-25 15:18:16 -07:00
tangxifan dd0680246a [Doc] Typo fix on fabric key command 2021-01-25 14:12:40 -07:00
ganeshgore 1ba7e0663f
Merge pull request #176 from lnis-uofu/dev
Documentation Formatting
2021-01-24 21:11:49 -07:00
tangxifan e18c533657 [Doc] Add new openfpga shell command to documentation 2021-01-24 14:48:56 -07:00
tangxifan 815468ac65 [Doc] Add shortcut to call pin constraint option to documentation 2021-01-20 09:20:51 -07:00
tangxifan 977ff52cb1 [Doc] Format openfpga command documentation by using option views 2021-01-19 20:26:38 -07:00
tangxifan e9dc708d66 [Doc] Group file format documentation into a unified section 2021-01-19 19:44:44 -07:00
tangxifan fbb5c0cf8f [Doc] Add pin constraints to documentation 2021-01-19 18:04:45 -07:00
tangxifan c7f02601ab [Doc] Add repack design constraints to documentation 2021-01-17 12:59:46 -07:00
tangxifan 3aeea724de [Documentation] Update for new options in fpga-verilog 2020-10-12 12:36:24 -06:00