riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[Doc] Add shortcut to call pin constraint option to documentation

This commit is contained in:
tangxifan 2021-01-20 09:20:51 -07:00
parent 977ff52cb1
commit 815468ac65
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
docs/source/manual/openfpga_shell/openfpga_commands/fpga_verilog_commands.rst
View File

@ -53,9 +53,9 @@ write_verilog_testbench
Must specify the reference benchmark Verilog file if you want to output any testbenches. For example, ``--reference_benchmark_file_path /temp/benchmark/counter_post_synthesis.v``
.. option:: --pin_constraints_file <string>
.. option:: --pin_constraints_file <string> or -pcf <string>
Specify the *Pin Constraints File* (PCF) if you want to custom stimulus in testbenches. For example, ``pin_constraints_file pin_constraints.xml``
Specify the *Pin Constraints File* (PCF) if you want to custom stimulus in testbenches. For example, ``-pin_constraints_file pin_constraints.xml``
Strongly recommend for multi-clock simulations. See detailed file format about :ref:`file_format_pin_constraints_file`.
.. option:: --fast_configuration