We have the API target_event_name().
Use it to improve code readability.
Change-Id: Ic48d2227bdefe9af05aff99a871a45e0612e5254
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6790
Tested-by: jenkins
If the CTI is not specified OpenOCD fails target's examination
without indicating the reason.
Drop an error message about the missing CTI.
Change-Id: I344537fb21cf38785796ba938e71890e04135509
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6788
Tested-by: jenkins
This replaces a static array with 8 bytes per register. When there are
vector registers larger than 8 bytes, they would end up clobbering each
other's values. I can't believe I didn't catch this earlier.
See https://github.com/riscv/riscv-openocd/pull/658
Change-Id: I9df4eaf05617a2c8df3140fff9fe53f61ab2b261
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6775
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
We have the macro
#define COMMAND_HANDLER(name) \
static __COMMAND_HANDLER(name)
Use it!
Change-Id: I0e5385cb54197c743348f0d2ce215c93b8e396a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6786
Tested-by: jenkins
Unlike cortex_m_load_core_reg_u32() storing core register uses
the same code pattern around DHCSR read as offered by the convenience
helper cortex_m_read_dhcsr_atomic_sticky().
Use the helper.
Change-Id: Ia947204944a8b549f3c2be7fb2f717aad18970c4
SeeAlso: 65d7629183 (cortex_m: poll S_REGRDY on register r/w)
SeeAlso: 0dcf95c717 (target/cortex_m: cumulate DHCSR sticky bits)
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6767
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change [1] introduced a regression that results in comparison
in arm_jtag_set_instr() to be always true if the length of the
IR register is not 8 bit. The value on the left side
of the != operator contains only tap->ir_length number of
bits while value on the right is full 8-bit instruction code.
This forces OpenOCD to update the JTAG IR register on each
transaction even if the instruction in the JTAG IR register
is correct. This causes noticeable performance degradation,
especially with slow JTAG adapters.
[1] https://review.openocd.org/c/openocd/+/6285
time ./src/openocd -s tcl/ -f interface/cmsis-dap.cfg \
-c "transport select jtag" -f target/psoc6.cfg \
-c "init; load_image data.bin 0x08000000; exit"
Without this change:
real 0m4,863s
user 0m0,074s
sys 0m0,128s
With this change:
real 0m3,083s
user 0m0,038s
sys 0m0,098s
Signed-off-by: Bohdan Tymkiv <bohdan200@gmail.com>
Change-Id: Iaded83a04ecc7e65f18256afae582267ccc1fc59
Reviewed-on: https://review.openocd.org/c/openocd/+/6762
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
ARM IHI 0031A does not support SWJ-DP, so no switch between JTAG
and SWD is considered.
ARM IHI 0031B is not publicly available and it's reported as
"Confidential Beta" in the history list in following doc versions.
From ARM IHI 0031C the direct switch between JTAG and SWD is
already deprecated in favor of passing through dormant mode. With
no access to IHI 0031B we haven't info if any device strictly
requires the direct switch.
OpenOCD implements only the deprecated direct switch, so changing
it could cause regression on devices that do not implement dormant
mode.
Plus, not all the adapters support dormant mode.
Nevertheless there are already target devices that only allow
entering in SWD by passing through dormant.
Let the code try both method, alternating one tentative with the
deprecated legacy direct switch, then another tentative passing
through dormant, and repeat till timeout.
This would work on any device that don't support dormant, on new
devices that require switch through dormant and will work with
adapters that don't support dormant.
Change-Id: Ib8619635277d497872079a33fa4e38be9beb84a0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6695
Tested-by: jenkins
The function debugport_init() has never existed in OpenOCD code,
but few comments erroneously references it in place of the
existing function ahbap_debugport_init().
Commit 00dbc185ee ("arm_adi_v5: Split ahbap_debugport_init")
splits the function ahbap_debugport_init() in dap_dp_init() and
mem_ap_init(), but did not removed all the incorrect comments
about debugport_init(). Few of such comments has been removed in
later patches.
Remove the last comment that references debugport_init().
Change-Id: Ibd1f125475386e5653340fedf706903a0ee15897
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6694
Tested-by: jenkins
Standard C library free() allows NULL pointer as a parameter.
Change target_free_working_area() to conform this convention.
Remove NULL pointer tests before target_free_working_area() calls.
While on it add missing setting pointer to NULL after target_free_working_area().
Change-Id: I7c692ab04a9933398ba5bc614723ad0bdecb87b3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6712
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
hla_target uses the same struct cortex_m_common as the standard cortex_m
target. Unlike the cortex_m target hla missed setting of common_magic.
Set commont_magic to help pointer verification.
Add convenience tests is_cortex_m_or_hla() and
is_cortex_m_with_dap_access()
Use proper test in cortex_m_verify_pointer() - this code relied on
unset common_magic on hla target before the change.
Change-Id: I4dae79f056c3d73adf524e26aa8ef2d3a57b471e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6741
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Just to avoid name clash when comparing documentation with
registered commands through scripts.
Change-Id: I8832545d8d9236ea5dabe6e73732f51e5246caff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6717
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Do not split in multiple lines the calls to register_commands*().
No change in code behaviour, just make it easy to grep in the code
and identify the commands that can be registered.
This would help detecting undocumented commands.
Change-Id: Id654e107cdabf7ee31fc3d227c1d2a59acc5669e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6716
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Raise error if
* more than one plain SWD DAPs are defined
* plain and multidrop DAPs are mixed
* two multidrop DAPs have the same TARGETSEL value
Inspired by Graham Sanderson's http://review.openocd.org/4935
Change-Id: I7279744464f5cc6477e50695c596be9c5e5507bf
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6142
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Based on Graham Sanderson's http://review.openocd.org/4935
Unlike Graham Sanderson's version this patch does not add
any multidrop specific queuing.
Multidrop SWD is handled mostly by the same code as single SWD,
just a selection sequence is prepended to a SWD operation
as needed.
This is a minimal working implementation without checking for
configuration errors (mixing multidrop and non multidrop DPs,
multiple use of the same selection id etc...).
Multidrop switching likely demands changes in the adapter code.
Change-Id: I99a5742c209b49c0483e800f6105cb5e59a897d9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6141
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
dap_configure() contained first time init related tasks, as the call to
dap_init_instance() and the check for configured tap.
Move all first time init related stuff to dap_create() to make dap_configure()
usable in eventual stand-alone 'dap configure' command.
Change-Id: Ia86eadb4e960ce54e8581630d01af75720d2318d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6702
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This is a preparatory change for swd multidrop, mostly refactoring.
Split swd_queue_dp_read/write() to inner and outer parts.
Use the inner parts in swd_queue_dp_bankselect(), swd_connect()
they do not need to check reconnect.
Use the outer parts exclusively in swd_dap_ops.
Rearrange the code to reduce forward declarations.
Change-Id: I47b7f0cb037e0032a267463f06ba02123ba96fe7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6139
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
I missed this when I first add mcontrol6 support.
https://github.com/riscv/riscv-openocd/pull/648
Change-Id: I1a2706c7ea3a6757ed5083091cd2c764a8b0267c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6684
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The main intention is to get access to some of the CSRs
that were so far unknown to OpenOCD (tinfo, mcountinhibit, ...).
https://github.com/riscv/riscv-openocd/pull/659
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I824fdb558d5c1f73432b0f56f3b0b4d865eceeba
Reviewed-on: https://review.openocd.org/c/openocd/+/6682
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add the value DORMANT_TO_JTAG in the enum listing the SWJ-DP
switching sequences.
The corresponding bit-sequence is already available.
Change-Id: I6f1ffd29a8f5729ec70ce0303248bc251409d37d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6689
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
If the target is in a state where S_REGRDY polling is necessary (slow
clock, low power state...?), OpenOCD will continue to use the slow
path even if the condition is temporary and the target at a later
point would be capable of fast reads again.
Revert to fast reads if a full register dump can be made without need
for polling any of the registers; presumably it will succeed the next
time too.
Change-Id: I557f0d90b7ce6f9d81aa409b6400fc9c83d16008
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6678
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Without the change cortex_m_debug_entry() reads all registers
calling cortex_m_load_core_reg_u32() for each register with
a poor usage of JTAG/SWD queue.
It is time consuming, especially on an USB FS based adapter.
Moreover if target_request debugmsgs are enabled, DCB_DCRDR
is saved and restored on each register read.
This change introduces cortex_m_fast_read_all_regs()
which queues all register reads and a single dap_run() transaction
does all work.
cortex_m_fast_read_all_regs() reads all registers unconditionally
regardless register cache is valid or not. This is a difference
from the original cortex_m_debug_entry() code.
cortex_m_debug_entry times from -d3 log, Cortex-M4F and CMSIS-DAP
(Kinetis K28F-FRDM kit)
target_request | time [ms]
debugmsgs | without the change | with the change
---------------+--------------------+-----------------
disable | 186 | 27
enable | 232 | 29
Added checking of DHCSR.S_REGRDY flag. If "not ready" is seen,
cortex_m->slow_register_read is set and fallback to the old
register read method cortex_m_slow_read_all_regs() is used
instead of cortex_m_fast_read_all_regs().
Change-Id: I0665d94b97ede217394640871dc451ec93410254
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/5321
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Accordingly to arm documentation [1], chapter C1.6.4, the
operation to read/write from/to core registers can require time,
and the specific flag DHCSR.S_REGRDY has to be polled to verify
that the operation has been completed.
The lack of check on S_REGRDY causes OpenOCD to fail handling
correctly the core registers on a Cortex-M4 emulated in a slow
FPGA, and it could also fail on devices clocked at very low speed
while using a fast adapter.
Poll S_REGRDY as specified in [1] while either reading or writing
the core registers.
A timeout of 0.5s is added. This could still be too small in some
extremely slow cases, but at least now we log the timeout event,
which can help tracking down such odd issue.
During register read include in the polling loop the read of DCRSR
and to flush the JTAG queue only once.
During register write, relax the write in DCRSR by removing the
atomicity that is now useless since followed by the atomic read to
S_REGRDY.
During register read include the read of DCRSR inside the polling
loop to relax the read of S_REGRDY since followed by the atomic
read to DCRSR.
This change has the drawback of adding other transfers to the
adapter while reading/writing the registers, so it is expected to
introduce some speed degradation during step-by-step.
[1] DDI0403E - "ARMv7-M Architecture Reference Manual"
Change-Id: I61f454248f11a3bec6dcf4c58a50c5c996d7ef81
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/5319
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
DCB DHCSR register contains S_RETIRE_ST and S_RESET_ST bits cleared
on a read.
The change introduces a helper function cortex_m_cumulate_dhcsr_sticky().
Call this function each time DHCSR is read to preserve S_RESET_ST state
in the case of a reset event was detected.
Introduce cortex_m_read_dhcsr_atomic_sticky() convenience helper to
read DHCSR, store it to cortex_m->dcb_dhcsr and cumulate sticky bits.
The cumulated state of S_RESET_ST is read and cleared in cortex_m_poll()
Change-Id: Ib679599f850fd219fb9418c6ff32eed7cf5740da
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6180
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
cortex_m->dcb_dhcsr caches status of DHCSR register.
Use it instead of local variable in cortex_m_soft_reset_halt()
like in other code.
Extracted from [1].
[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr
Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9a0aeba0b6b0b4969f05f4a32fc2fc8d244f56ca
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6677
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
cortex_m_single_step_core() used mem_ap_write_atomic_u32() to manipulate
dhcsr bits unlike the rest of code, where a specialized function
cortex_m_write_debug_halt_mask() takes place.
Unify setting of dhcsr bits and use cortex_m_write_debug_halt_mask() here as well.
Extracted from [1].
[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr
Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9ef05ce88a9dce42e1d3d5404a4fe87ec86b5fe8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6676
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
After moved the code, align the include files.
Change-Id: I514a3020648816810d69f76c2ec4f6e52a1c57ab
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6643
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Doxygen cannot resolve the path of the files in folder contrib.
Use a path relative to current folder, as done in other files.
Change-Id: If39b416ed422b4854dd108777fa32dd4c809450a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6635
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
There is no reason to add the 'src' prefix.
Remove it.
Change-Id: Id7d7ee8b3807fb90381cc1d6d545321020bc06c1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6634
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Made no attempt to separate this out into reviewable chunks, since this
is all RISC-V-specific code developed at
https://github.com/riscv/riscv-openocd
Memory sample and repeat read functionality was left out of this change
since it requires some target-independent changes that I'll upstream
some other time.
Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6529
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Clang scan-build complains for three dead assignments:
Although the value stored to 'data' is used in the
enclosing expression, the value is never actually read
from 'data'
Value stored to 'address' is never read
Remove the useless assignment and the variable 'data'.
Change-Id: Ie8dcb74b1c1aa5eea1acd06b3c45c5b44954c9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6592
Tested-by: jenkins
Clang scan-build complains for a dead assignment:
Value stored to 'tapstatus' is never read
Remove the assignment and add a comment to point for a potential
removal of the line.
Change-Id: Iad2fdc7e6faf650e24cc086ee74c745acb0d1c73
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6591
Tested-by: jenkins
Clang scan-build complains for five dead assignments:
Value stored to 'retval' is never read
Check the returned value and propagate the error.
Change-Id: I01172887a056d6f39ddcf2807848423970db1e89
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6590
Tested-by: jenkins
Clang scan-build complains for two dead assignments:
Value stored to 'r' is never read
Use the variable in the following line, instead of re-computing
the pointer.
Change-Id: I5d4069872be9da85fb28bbe0a82020b90f1efe46
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6589
Tested-by: jenkins
Clang scan-build complains for two dead assignments:
Value stored to 'retval' is never read
Since the timer callback should not return error, print an error
message if the data cannot be send out. Add a FIXME comment
because in current code there is no string/name to report which
connection has failed.
In command tpiu enable check the returned value and propagate the
error.
Change-Id: I9a89e4c4f7b677e8222b2df09a31b2478ac9ca4f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6588
Tested-by: jenkins
The header files under src/helper/ can currently be included with
either
#include <bits.h>
or
#include <helper/bits.h>
This is because we specify both "src/" and "src/helper/" directories
as include directories. Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.
This commit remove "src/helper/" from our include dir and make C files
include explicitly.
Change-Id: I38fc9b96ba01a513d4a72757d40007e21b502f25
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6507
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
For example: before this change in cortex_m_examine, if we fail reading CPUID
we return a failure code but target was set to examined which is not consistent.
Change-Id: I9f0ebe8f811849e54d1b350b0db506cb3fdd58f4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6548
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Giving the example of STM32WL55x the examine log is the following:
Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints
After this change the examine log becomes:
Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints
Change-Id: I1873a75eb76f0819342c441129427b38e984f0df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The jimtcl API Jim_GetCommand() sets an error message when the
command is not found and flag JIM_ERRMSG is set.
OpenOCD is checking if the command has already been registered,
thus 'command not found' is the desired case.
Pass flag JIM_NONE to prevent jimtcl from setting the error
message.
Change-Id: I3329c2f8722eda0cc9a5f9cbd888a37915b46107
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6562
Tested-by: jenkins
Commit dc7b32ea4a ("armv7m_trace: get rid of the old tpiu code")
is not handling correctly the old 'tpiu' command if it is run
during the config phase (before command 'init').
Move the call to the old event handler 'trace-config' in function
jim_arm_tpiu_swo_enable(), so it is correctly executed after
'init'.
Add the call to the old event handler 'trace-config' also during
jim_arm_tpiu_swo_disable(), to match the old behaviour.
Add more information while alerting that the event 'trace-config'
is deprecated.
Change-Id: If831d9159b4634c74e19c04099d041a6e2be3f2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: dc7b32ea4a ("armv7m_trace: get rid of the old tpiu code")
Reviewed-on: https://review.openocd.org/c/openocd/+/6561
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
The initial version of the table dap_part_nums contains only the
part number of the device and not the manufacturer ID.
This causes collisions between devices with same part number but
from different manufacturer.
The table has been extended to include the manufacturer JEDEC code
in commit 2f131d3c30 ("ARM ADIv5: CoreSight ROM decode part
number and designer id").
For two old/legacy table's entries reported without manufacturer
code it was defined a special ANY_ID manufacturer, meaning skip
the check for manufacturer!
The two legacy entries report the comment "from OMAP3 memmap", and
thanks to the associated string has been possible through Google
to identify a Master Report [1] about using OpenOCD with the OMAP3
in a BeagleBoard. The ROM table is printed with OpenOCD command
"dap info 1" at page 8 and reports the Peripheral ID required to
extract the manufacturer ID that, out of any surprise, belong to
Texas Instruments.
Set the two missing manufacturer ID to Texas Instruments JEDEC
code.
Remove the now redundant definition and use of ANY_ID.
While revisiting this old code, remove also the useless comment
"0x113: what?". It was introduced in commit ddade10d4a ("ARM
ADIv5: "dap info" gets more readable") and from the same dump in
[1] it's clearly another element in OMAP3. It is listed as entry
0x8 in the ROM table and there is no further info available.
OpenOCD will anyway list it as:
Designer is 0x017, Texas Instruments
Part is 0x113, Unrecognized
Another link https://elinux.org/BeagleBoardOpenOCD reports the
text "Part number 0x113: This is ????", which sounds familiar!
No public document from Texas Instruments reports what is this
device at address 0x54012000.
[1] Warren Clay Grant - University of Texas at Austin
"Implementation of an Open Source JTAG Debugging Development
Chain for the BeagleBoard ARM® Cortex A-8" - May 2012
Link: https://repositories.lib.utexas.edu/bitstream/handle/2152/ETD-UT-2012-05-5478/GRANT-MASTERS-REPORT.pdf
Change-Id: I7e007addbb5c6e90303e4e8c110c7d27810fbe9c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6454
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Extract new part numbers from Arm Cortex-R52 Processor Technical
Reference Manual Revision r1p3 and add them to the array
dap_partnums.
Change-Id: I8020f36de587951af60422ef33d7e438dc7d9d53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6451
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Extract new part numbers from ARM CoreSight System-on-Chip SoC-600
Technical Reference Manual Revision r4p1 and add them to the array
dap_partnums.
Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6450
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
For readability, move in a separate function the decoding and the
display of devtype register.
The function will be reused with ADIv6.
Split from change https://review.openocd.org/6077/
Change-Id: I7a26a2c9759d5db5f9acfae5c169b90b3deb2f18
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6448
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
The complete AP type should include 'class' and 'manufacturer'.
Cleanup the definition of AP type from AP_REG_IDR register.
Include the check of 'class', together with manufacturer and type.
Add the new MEM-AP from ARM IHI0074C.
Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6447
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Several magic numbers related to ARM CoreSight specification
IHI0029E are spread around OpenOCD code.
Define through macros the ARM CoreSight magic numbers and collect
them in a single include file.
Use the new macros wherever possible.
Change-Id: I9b0c1c651ce4ffbaf08d31791ef16e95983ee4cb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6446
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.
Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.
Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.
Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
NULL is defined as 'void *'.
There is no need to cast NULL while assigning it to a pointer.
Change-Id: Ibaf18e5d47329707ec9c1c184cd4bba2e8e702ff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6540
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
The NULL pointers preceded by cast where not detected by the
scripting tools looking for NULL pointer comparison.
Remove them and, while there, further simplify the code and apply
the other coding style rules.
Change-Id: Ia7406122e07ef56ef311579ab0ee7ddb22c8e4b5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6539
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
This works well with gdb on RISC-V, since hardware breakpoints are
per-core and gdb thinks that targets are really processes on a machine.
Are there targets where this is a bad idea? Should the target definition
specify whether this behavior is desired or not?
Change-Id: Ia32be2707b04347fd8bf2ca6fbb2b0ceaad3704a
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6528
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
As per Arm Debug Interface Architecture Specification (ADIv5.0 to
ADIv5.2), B3.3.1, the JTAG-DP as an IR length of 4 or 8 bits
depending on the ARM implementation. The current code
only support 4-bit and this patch extends the support to 8-bit IR.
Not tested back yet on a 4-bit target.
Change-Id: Ie4f875dc336caf014c6cfced57574b54d0970623
Signed-off-by: Antoine C. <acalando@free.fr>
Reviewed-on: https://review.openocd.org/c/openocd/+/6285
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Current implementation ignores the flag '-ap-num' provided to
command 'target create' and searches for the first AP of APB type.
If specified, use the ap number.
Change-Id: If1ac12345220d14a4a60515efe46dc2a2eac079a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6413
Tested-by: jenkins
JEP106 encodes JEDEC-assigned manufacture code as:
a) a sequence of zero or more escape codes 0x7f;
b) an odd-parity bit of the next 7 bits;
c) 7 bits.
The same code is often represented as a single value composed by
the logical OR between:
- the number of escape codes in a), shifted left by 7 positions;
- the 7 bits in c).
This is the preferred packed representation used by this change.
Currently there are only two uses of JEP106 in openocd to get the
manufacturer name:
- to decode the JTAG IDCODE of each TAP, where the JEP106 code is
already packed as in the preferred representation above in bits
IDCODE[11:1];
- to decode the ARM CoreSight PIDR register, where the JEP106 code
is split in 3 parts:
= PIDR3[3:0], corresponding to bits [10:7] of the packed code;
= PIDR2[2:0], corresponding to bits [6:4] of the packed code;
= PIDR1[7:4], corresponding to bits [3:0] of the packed code.
Wrap the existing JEP106 decode function in a simpler API using
the packed code.
Simplify the callers by skipping the bit unpacking.
Change the manufacturer code in CoreSight table dap_partnums[] to
match the packed representation, by removing the always-one bit 7
erroneously taken from PIDR bit JEDEC and included in the former
table.
Change-Id: I63eb4da9e6801fab25e330f1f6b792d2fd619493
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6418
Tested-by: jenkins
Update the list of ARM coresight classes wrt to latest ARM
documentation.
Use c99 array designator to easily track changes in future.
Add a comment for the entry "OptimoDE DESS". It was added in 2009
by David Brownell, but Google cannot find any reference other than
this line in openocd code its associated commit. It should not be
an issue keeping it as is.
Change-Id: Ia3b646131ee68ca5263095c3a0aeaf75c004b324
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6431
Tested-by: jenkins
The command 'step' accepts an optional parameter 'address' to run
the step-by-step execution from an address different from current
program counter.
When OpenOCD sets the new program counter value in the register
cache, it doesn't flag it as dirty. The following call to function
armv7m_restore_context() does not propagate the new value of the
program counter to the target. This cause the target to continue
from the old program counter value, ignoring the user's request.
It is hard to notice the issue if the target is halted in an idle
loop! In fact the default mode to operate step-by-step is to set a
breakpoint to the following instruction and resume execution. In
the idle loop the CPU will pass through the breakpoint whatever
the resume address is. User will find the target halting at the
instruction following 'address' which is consistent with the
expected behaviour of command 'step address'.
To verify the issue on an STM32F4, use a dummy code in SRAM:
halt
mww 0x20000000 0xbf00bf00
mww 0x20000004 0xbf00bf00
mww 0x20000008 0xe7fcbf00
arm disassemble 0x20000000 6
0x20000000 bf00 nop
0x20000002 bf00 nop
0x20000004 bf00 nop
+--> 0x20000006 bf00 nop
| 0x20000008 bf00 nop
+-<- 0x2000000a e7fc b #0x20000006
resume 0x20000006
halt
step 0x20000000
the target doesn't halt because it is in the loop from 0x20000006
to 0x2000000a. The 'step 0x20000000' did not changed the program
counter so the temporary breakpoint at 0x20000002 is never hit.
Then:
halt
step 0x20000008
target halted ...
... pc: 0x2000000a
gives the feeling that only the instruction at 0x20000008 has been
executed, but actually the whole loop has been executed from the
place 'halt' stopped the execution till the breakpoint at the
instruction following 0x20000008.
Flag the program counter cached value as 'valid' and 'dirty' to
force armv7m_restore_context() to update the target's register.
Change-Id: I49bd8bb95b2f5429ec38ed016f2ad706618ae68a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6434
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 11019a824d ("adi_v5: enforce check on AP number value")
introduces the macro DP_APSEL_MAX and use it in place of hardcoded
magic numbers for the upper limit of AP selection value.
Fix one more place where the macro should be used.
Change-Id: I6c57f72405c69bbb40924221309d95dfeb5f7540
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 11019a824d ("adi_v5: enforce check on AP number value")
Reviewed-on: http://openocd.zylin.com/6415
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Commit ac22cdc573 ("target/adiv5: Large Physical Address
Extension") reads the register MEM_AP_REG_CFG and keeps it in a
new field of struct adiv5_ap. The test on LE bit (Large Extension)
is used to identify if mem_ap addresses are 32 or 64 bits.
But the register MEM_AP_REG_CFG is only read during mem_ap_init(),
that is called only when the AP is used as a target debug AP or if
a target mem_ap is attached to that AP.
The openocd commands '<dapname> baseaddr', '<dapname> info' and
'dap info' can be executed on AP that has not been associated yet
to a target, thus executed without any knowledge of MEM_AP_REG_CFG
value. The initialization to ADI_BAD_CFG causes openocd to always
use 32 bit mode on un-associated APs.
Verify if MEM_AP_REG_CFG has not been read and eventually read it.
In case of 32 bits mode AP, MEM_AP_REG_BASE64 is defined as 'RES0'
(reserved, but readable); the code can queue both the read of
MEM_AP_REG_CFG and MEM_AP_REG_BASE64, before knowing if the former
is required. This speeds-up the operation.
Rename ADI_BAD_CFG as MEM_AP_REG_CFG_INVALID.
Change-Id: If3bbd792b56a483022c37ccc2ce82b5ba5c36caa
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: ac22cdc573 ("target/adiv5: Large Physical Address Extension")
Reviewed-on: http://openocd.zylin.com/6412
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
In both arm ADIv5 and ADIv6 documentation, for both Class 0x1 and
Class 0x9 ROM tables, the offset field from ROM tables is supposed
to be a signed value: "Negative values of OFFSET are permitted,
using two’s complement."
The commit ac22cdc573 ("target/adiv5: Large Physical Address
Extension") extends to 64 bits the addresses while managing the ROM
tables. The offset is read as unsigned and in the former 32 bits
implementation the wrap-around was hiding the need for converting
the offset to signed. The new implementation requires the proper
cast to the offset.
On a STM32F411, without this fix the ROM table dump is incorrectly
reporting addresses out of the 32 bit bus range:
MEM-AP BASE 0xe00ff003
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00000a0411
Designer is 0x0a0, STMicroelectronics
Part is 0x411, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
ROMTABLE[0x0] = 0xfff0f003
Component base address 0x1e000e000
^^^^^^^^^^^
Cast the offset before adding it to the base address of the ROM
table.
Change-Id: I8d31fd2b3d657286cb96f8e22fb00842baa728f7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: ac22cdc573 ("target/adiv5: Large Physical Address Extension")
Reviewed-on: http://openocd.zylin.com/6410
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Use the new helper to make the code more readable.
Change-Id: I11b2a79dbc6f93f6cfde382bcc00dd7ff710d908
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6375
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
The existing implementation blocks in select() for a fixed amount of
time. This change tracks when the next event (likely poll()) wants to be
run, and uses a shorter timeout in select() if necessary.
Also track all these timeouts using milliseconds as returned by
timeval_ms() instead of `struct timeval` to simplify the code.
This feature is helpful if poll() wants to do something like sample PCs
or memory values for basically the entire time that otherwise OpenOCD
would be hung in select(). See
https://github.com/riscv/riscv-openocd/pull/541 for an example of that.
The RISC-V code using this change will be upstreamed some day, too.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I67104a7cf69ed07c8399c14aa55963fc5116a67d
Reviewed-on: http://openocd.zylin.com/6363
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add identifiers of the Cortex-A76 ROM and debug unit.
Change-Id: Ieef0d990189d3c0502e8d530874dc9cbca4417d8
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/6358
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The Broadcom Brahma-B53 CPUs contains a number of custom ROM table
entries for its PMU, Debug unit, and a couple of ROM tables.
Change-Id: I1f21f07ed296579c374f24e781325789bf4ebf51
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/6368
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The new checkpatch can automatically fix the code, but this
feature is still error prone and not complete.
Patch generated automatically through the new checkpatch with
flags "--types CONSTANT_COMPARISON --fix-inplace".
Some Yoda condition is detected by checkpatch but not fixed; it
will be fixed manually in a following commit.
Change-Id: Ifaaa1159e63dbd1db6aa3c017125df9874fa9703
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6355
Tested-by: jenkins
For the remaining NULL comparisons, remove then manually.
While there, make more readable a loop, by moving the assigment
out of the loop condition.
Change-Id: I44193aaa95813156a3a79c16b80e1ad333dc1eaf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6353
Tested-by: jenkins
Patch generated automatically through a modified checkpatch that
detects the patterns
if (NULL == symbol)
if (NULL != symbol)
and through flags "--types COMPARISON_TO_NULL --fix-inplace".
The unmodified checkpatch detects this pattern as Yoda condition,
but it's odd fixing it as Yoda condition and then again as NULL
comparison. This triggered the modification to the script.
Change-Id: I5fe984a85e9c4fc799f049211797aef891ebce18
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6352
Tested-by: jenkins
Patch generated automatically through the new checkpatch with
flags "--types COMPARISON_TO_NULL --fix-inplace".
This only fixes the comparisons
if (symbol == NULL)
if (symbol != NULL)
The case of NULL on the left side of the comparison is not tested.
Some automatic fix is incorrect and has been massaged by hands:
- if (*psig == NULL)
+ if (*!psig)
changed as
+ if (!*psig)
Change-Id: If4a1e2b4e547e223532e8e3d9da89bf9cb382ce6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6351
Tested-by: jenkins
There are more than 1000 NULL comparisons to be aligned to the
coding style.
For recurrent NULL comparison it's preferable using trivial
scripts in order to minimize the review effort.
Patch generated automatically with the command:
sed -i PATTERN $(find src/ -type f)
where PATTERN is in the list:
's/(\([a-z][a-z0-9_]*\) == NULL)/(!\1)/g'
's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) == NULL)/(!\1)/g'
's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) == NULL)/(!\1)/g'
's/(\([a-z][a-z0-9_]*\) != NULL)/(\1)/g'
's/(\([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\) != NULL)/(\1)/g'
's/(\([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\) != NULL)/(\1)/g'
's/(NULL == \([a-z][a-z0-9_]*\))/(!\1)/g'
's/(NULL == \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(!\1)/g'
's/(NULL == \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(!\1)/g'
's/(NULL != \([a-z][a-z0-9_]*\))/(\1)/g'
's/(NULL != \([a-z][a-z0-9_]*->[a-z][a-z0-9_]*\))/(\1)/g'
's/(NULL != \([a-z][a-z0-9_]*\.[a-z][a-z0-9_]*\))/(\1)/g'
Change-Id: Ida103e325d6d0600fb69c0b7a1557ee969db4417
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6350
Tested-by: jenkins
No major cross dependencies, mostly changes internal to each
file/function.
Change-Id: I7cc87458a341bae29a4f772b0af5d97b4bfc2da3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6343
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Fix the remaining Yoda conditions, detected by checkpatch but not
fixed automatically.
While there, apply minor style changes.
Change-Id: I6e1978b89c4d56a20aceaeb2b52968eb6384432a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6356
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
There are ~900 Yoda conditions to be aligned to the coding style.
For recurrent Yoda conditions it's preferable using a trivial
script in order to minimize the review effort.
E.g. comparison of uppercase macro/enum with lowercase variable:
- ...(ERROR_OK == retval)...
+ ...(retval == ERROR_OK)...
Patch generated automatically with the command:
sed -i \
's/(\([A-Z][A-Z0-9_]*\) \([=!]=\) \([a-z][a-z0-9_]*\))/(\3 \2 \1)/g' \
$(find src/ -type f)
While there, remove the braces {} around a single statement block
to prevent warning from checkpatch.
Change-Id: If585b0a4b4578879c87b2dd74d9e0025e275ec6b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6354
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>
Convert to lowercase the name of arrays.
Convert to macro two uppercase const variables.
Change-Id: Ic6f5cad38722dfdf78d662ff4893e94482ab423d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6348
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Xiang W <wxjstz@126.com>
No major cross dependencies, mostly changes internal to each
file/function.
Change-Id: Iec58f7fe1d65f621ae0c841b5e25ef222885792b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6341
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Xiang W <wxjstz@126.com>
No major cross dependencies, mostly changes internal to each
file/function.
Change-Id: I1325560ef0350517d86d4927cb17ceaae81b75d2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6340
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
No major cross dependencies, mostly changes internal to each
file/function.
Change-Id: I3f0879f0f33c6badc36a0dc60229323978a7e280
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6338
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
- Added support for reading and writing 64-bit data items
using TCL commands "mem2array" and "array2mem". Until now,
data items only up to 32 bits were supportd.
- Cleaned up functions target_array2mem() and
target_mem2array(), especially data types of variables
and variable declarations (scope).
Change-Id: Ia0ba427804f8fd8d7568f12714ab36984d6d5e24
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/6286
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add 64-bit address support to the target mem2array and array2mem commands
Change-Id: Ibdcc076ca5581f4fd87e92318aab33907e22d6ce
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/6246
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This change fixes behavior of the SEMIHOSTING_SYS_CLOSE operation.
It ensures that OpenOCD's own stdin/stdout/stderr streams are never
closed, not even if the target requests it via semihosting.
Change-Id: Ia85af5963d1a3516284fd834f7197369a8fb268c
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/6291
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Capture the value of "errno" in semihosting isatty() call,
as is done in other syscalls.
Change-Id: I41b72175635f06c000536f583e3efa30fb57379e
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/6292
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
- In "reg" TCL command handler, the return value of register get()
and set() callbacks must be checked, in the same manner as it is
done in e.g. gdb_set_register_packet() or gdb_get_register_packet().
- Minor cleanup of variable definitions in the "reg" command
handler.
Change-Id: I8c57e7c087fe31d1abffa3c4d1f79a01af4c9c97
Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/6293
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Provides ARM LPAE support to allow 64-bit TAR setting
on MEM AP accesses.
Tested on a 4-core ARM ARES Processor system using an
AXI Access Port.
Change-Id: I88f7a0a57a6abb58665032929194a41dd8729f6b
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5576
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The HLA target is not anymore used by ST-Link only, but required
by Nu-Link and TI-ICDI too.
Rename the flag 'stlink' as 'is_hla_target'.
Change-Id: Id2ee2c0a1e8bf1f1e899f7a560140c34eefeeee5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6206
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
This fixes 'dead assignment' bugs identified by the clang static analyzer.
Change-Id: I140ed55f0043e06a533f45f50a36887614585b04
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6323
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Rework core detection by adding cortex_m_partno enum to detect all CPUs
using the same method.
Instead of checking the core PARTNO then assign the arch, use the stored
information within cortex_m parts[] with the flags inside which can help
simplifying a bit the cortex_m_examine code.
This change fixes:
- the Cortex-M1 detection as ARMv6-M Core (was managed as ARMv7-M)
- the displayed CPU name for Cortex-M0+ (was displayed Cortex-M0)
Change-Id: I40b6e03f7cf3664c85e297adfc25323196dfe90b
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6233
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
In target/arm.h the struct arm do contain 3 flags to retain architecture
version for some tweaks.
The proposal is to have only one enumerated flag 'arch' for the same purpose.
Change-Id: Ia5d5accfed8158ca21eb54af2fdea8e36f0266ae
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6229
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is used to compute memory block read alignment, and specifically
allows 64-bit targets to ensure that memory block reads are only
requested on 64-bit boundaries.
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: Idb1a27b9fc02c46245556bb0f3d6d94b368c4817
Reviewed-on: http://openocd.zylin.com/6249
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
With the API fixed to comply with OpenOCD coding style, fix all
the references in the code.
Patch generated automatically with the script below.
The list is in reverse order to replace a common prefix after the
replacement of the symbols with the same prefix.
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
(cat << EOF
Jim_SetResult_NvpUnknown jim_set_result_nvp_unknown
Jim_Nvp_value2name_simple jim_nvp_value2name_simple
Jim_Nvp_value2name_obj jim_nvp_value2name_obj
Jim_Nvp_value2name jim_nvp_value2name
Jim_Nvp_name2value_simple jim_nvp_name2value_simple
Jim_Nvp_name2value_obj_nocase jim_nvp_name2value_obj_nocase
Jim_Nvp_name2value_obj jim_nvp_name2value_obj
Jim_Nvp_name2value_nocase_simple jim_nvp_name2value_nocase_simple
Jim_Nvp_name2value_nocase jim_nvp_name2value_nocase
Jim_Nvp_name2value jim_nvp_name2value
Jim_Nvp struct jim_nvp
Jim_GetOpt_Wide jim_getopt_wide
Jim_GetOpt_String jim_getopt_string
Jim_GetOpt_Setup jim_getopt_setup
Jim_GetOpt_Obj jim_getopt_obj
Jim_GetOpt_NvpUnknown jim_getopt_nvp_unknown
Jim_GetOpt_Nvp jim_getopt_nvp
Jim_GetOpt_Enum jim_getopt_enum
Jim_GetOpt_Double jim_getopt_double
Jim_GetOpt_Debug jim_getopt_debug
Jim_GetOptInfo struct jim_getopt_info
Jim_GetNvp jim_get_nvp
Jim_Debug_ArgvString jim_debug_argv_string
EOF
) | while read a b; do
sed -i "s/$a/$b/g" $(find src -type f ! -name jim-nvp.\? )
done
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
Change-Id: I10a12bd64bb8b17575fd9150482c989c92b298a2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6184
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
The memory allocated to hold the watchpoints is not freed at
OpenOCD exit.
Free the watchpoint memory at OpenOCD exit.
Change-Id: I518c9ce0dc901cde2913d752e3154734f878b854
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6210
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Use byte address select for 1 and 2 bytes length.
Use normal mode for 4 bytes length.
Change-Id: I28d182f25145d0635de64d0361d456f1ad96640e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6197
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Decrement the available watchpoints only when succeed setting it.
Initialize the available watchpoint with the correct value.
Change-Id: I0f93b347300b8ebedbcd9e718d4ba32b26cf6846
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6196
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The current implementation of OpenOCD does not support watchpoints for
cortex_a architecture. So, I replaced the add_watchpoint and
remove_watchpoint with the specific implementation for the
cortex a and using the breakpoint implementation and the arm
documentation [1] as reference. In particular, I have made the
following changes:
* added the following functions
- cortex_a_add_watchpoint
This wrapper function check whether there are any watchpoint
available on the target device by calling cortex_a_set_watchpoint.
- cortex_a_set_watchpoint
This function is responsible for settings the watchpoint register
pair. In particular, it sets the WVR and the WCR registers with
the cortex_a_dap command.
- cortex_a_remove_watchpoint
This wrapper function the selected watchpoint on the target device
by calling cortex_a_unset_watchpoint.
- cortex_a_unset_watchpoint
This function sets both the WVR and the WCR registers to zero, thus
unsetting the watchpoint.
[1]
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/BCGDHIEJ.html
Change-Id: I86611dab474cb84836662af572b17636dc68e282
Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-on: http://openocd.zylin.com/3913
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Marc Schink <dev@zapb.de>
Tested-by: jenkins
When a WAIT occurs the commands after the WAIT are replayed and the
STICKYORUN is cleared. However if another WAIT occurs during the
command replay, the command itself is resent but the STICKYORUN bit
shall also be cleared. If this is not done, the MEM-AP hangs.
Change-Id: I14e8340cd5d8f58f4de31509da96cfa2ecb630d1
Signed-off-by: micbis <michele.bisogno.ct@renesas.com>
Reviewed-on: http://openocd.zylin.com/6278
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Some help text end with a useless space character.
Remove it.
Change-Id: I397e1194fac8042f0fab694222f925f906716de3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6222
Tested-by: jenkins
OpenOCD already defines the macro ARRAY_SIZE, while riscv code
uses a local macro DIM.
Prefer using the macro ARRAY_SIZE() instead of DIM().
Not all the riscv code has been upstreamed, yes; this patch only
covers the code already upstreamed.
Change-Id: I89a58a6d91916d85c53ba5e4091b558271f8d618
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6258
Reviewed-by: Xiang W <wxjstz@126.com>
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
The array newly_halted[] is assigned but its value is never used.
Drop it!
Change-Id: I678812a31c45a3ec03716e3eee6a30b8e8947926
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6257
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
The target mem_ap appears as an ARM target, thus it allows the
execution of ARM specific commands causing the crash of OpenOCD.
E.g. 'arm mrc ...' can be executed and segfaults.
Replace the incorrect ARM magic number with a dedicated one.
While there, remove the 'struct arm', that is now holding only the
mem_ap's dap, and replace it with a pointer to the dap.
Change-Id: I881332d3fdf8d8f8271b8711607737b052a5699b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6213
Tested-by: jenkins
Minor typos found by the new checkpatch boosted by the dictionary
provided by 'codespell'.
Change-Id: I548581247db72e683249749d1b8725035530b06e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6217
Tested-by: jenkins
The early documentation for armv8a report the debug register WFAR
as containing the address of the instruction that triggered the
watchpoint. More recent documentation report the register EDWAR as
containing the data memory address that triggered the watchpoint.
The name of macros CPUV8_DBG_WFAR0 and CPUV8_DBG_WFAR1 is not
correct as they point to the debug register EDWAR, so reading such
register returns directly the data memory address that triggered
the watchpoint. The code incorrectly passes this address value to
the function armv8_dpm_report_wfar(); this function is supposed to
adjust the PC value, decrementing it to remove the effects of the
CPU pipeline. This pipeline offset, that has no meaning on the
value in EDWAR, caused commit 651b861d5d ("target/aarch64: Add
watchpoint support") to add back the offset while comparing the
address with the watchpoint enabled.
The upper 32 bits of EDWAR are not valid in aarch32 mode and have
to be ignored.
Rename CPUV8_DBG_WFAR0/1 as CPUV8_DBG_EDWAR0/1.
Remove the function armv8_dpm_report_wfar().
Remove the offset while searching the matching watchpoint.
Ignore the upper 32 bits of EDWAR in aarch32 mode.
Fix a comment and the LOG text.
Change-Id: I7cbdbeb766fa18e31cc72be098ca2bc501877ed1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6205
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
The field 'wp_pc' was originally introduced in commit 55eeea7fce
("ARMv7a/Cortex-A8: report watchpoint trigger insn") in end 2009
to contain the address of the instruction which triggered a
watchpoint. Later on with commit 651b861d5d ("target/aarch64:
Add watchpoint support") it has been reused in to hold directly
the memory address that triggered a watchpoint.
Rename 'wp_pc' as 'wp_addr' and change its doxygen description.
While there, fix the format string to print the field.
Change-Id: I2e5ced1497e4a6fb6b38f91e881807512e8d8c47
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6204
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
VECTRESET check should be done after verifying if the core is an ARMv6-M core,
and not before that.
Fixes: 2dc9c1df81 ("cortex_m: [FIX] ARMv8-M does not support VECTRESET")
Change-Id: I8306affd332b3a35cea69bba39ef24ca71244273
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6232
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Despite of assert(is_packed) clang static analyser complains on use
of the uninitialized offset variable.
Cross compiling with latest x86_64-w64-mingw32-gcc hits warnings
src/target/armv7m.c: In function ‘armv7m_read_core_reg’:
src/target/armv7m.c:337:54: error: ‘reg32_id’ may be used
uninitialized in this function [-Werror=maybe-uninitialized]
It happens because mingw32 defines assert() without the attribute
"noreturn", whatever NDEBUG is defined or not.
Replace assert(is_packed) by if (is_packed) conditional and call
assert(false) in the else branch.
Change-Id: Id3c7dcccb65106e28be200b9a4d2b642f4d31019
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/6256
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
Use a constant output length and remove the line break to make the
authentication data easier to parse.
Change-Id: Iebbf1f171947ef89b0f360a2cb286a4ea15c6ba5
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6199
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.
Modify the script startup.tcl compiled-in OpenOCD binary to comply
with the new jimtcl.
Change-Id: I520dcafacadaa289a815035f93f250447ca66ea0
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6158
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
For both:
- TCL proc that redirect deprecated commands to the new commands,
- TCL proc used internally and not supposed to be exposed to user,
add their name to the list of commands that should be hide by the
telnet auto-complete.
Change-Id: I05237c6a79334b7d2b151dfb129fb57b2f40bba6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6195
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
this change aims to provide a better gdb debugging experience,
by making gdb understand what's really happening.
before this change when hitting a watchpoint
- openocd reports "T05" to gdb
- gdb displays: Program received signal SIGTRAP, Trace/breakpoint trap.
after the change
- openocd reports "T05watch:20000000;" to gdb
- gdb displays:
Hardware watchpoint 1: *0x20000000
Old value = 16000000
New value = 170000000
...
Change-Id: Iac3a85eadd86663617889001dd04513a4211ced9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6181
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Remove a use of AH_BOTTOM from configure.ac. This macro is used by
autoheader to add '#include' of some include file to the end of
config.h.in and then to config.h. OpenOCD can be built with a custom
config.h, so it's preferable to move these '#include' statement directly
in the C files that need them dropping this unneeded dependency.
It also causes problems when I want to use the gnulib library (which
comes with its own Makefile, and does not have the same include path as
the top-level Makefile).
So this change touches a lot of files, but is actually really simple. It
does not affect functionality at all.
Change-Id: I52c70bf15eb2edc1dd10e0fde23b2bcd4caec000
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/6171
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The existing code asserted in that case, which is not correct. This
would allow the user to crash OpenOCD with a bad ELF file, which is
not what we want. A proper error should be reported in that case and
OpenOCD should not crash.
Change-Id: Ied5a6a6fd4ee0fd163f3fe850d304a121ecbe33a
Signed-off-by: Christian Hoff <christian.hoff@advantest.com>
Reviewed-on: http://openocd.zylin.com/6172
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Commit 246782229f ("smp: replace commands smp_on/smp_off with
"smp [on|off]"") deprecates some multi-word comments, when openocd
was unable to properly handle mixes of multi-word commands and tcl
procedures having a common initial word.
This limitation is over, so move in startup.tcl the multi-word
commands deprecation, making it easy to remove them after a grace
period.
Change-Id: Icb550d1fa7559b95692d2a1244880da6c90ec0b2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5677
Tested-by: jenkins
While still keeping the tree of struct command, stop registering
commands in jim by the root "word" only.
Register the full-name of the command and pass as private data the
struct command of the command itself.
Still use the tree of struct command to un-register the commands.
Some "native" commands (.jim_handler) share the same handler, then
the handler checks the command name to run the right code.
Now argv[0] returns the full-name of the command, so check the
name by looking in the struct command passed as private data.
Change-Id: I5623c61cceee8a75f5d5a551ef3fbf5a303af6be
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5671
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Replace the "struct command *parent" parameter with a string that
contains the command prefix.
This abstracts the openocd code from the knowledge of the tree of
struct command.
This also makes unused the function command_find_in_context(), so
remove it.
Change-Id: I598d60719cfdc1811ee6f6edfff8a116f82c7ed6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5668
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
In current code the current target is overridden whenever
jim_handler_data is not NULL. This happens not only with target
prefixed commands, but also with cti, dap and swo/tpiu prefixed
commands.
While this is not causing any run-time issue, by now, the
behaviour is tricky and makes the code cryptic.
Add a specific field to struct command for the target override so
the content of jim_handler_data can be restricted to command
specific data only (today only cti, dap and swo/tpiu).
Extend the API register_commands() to specify the presence of
either the command data or the override target.
The new API makes obsolete calling command_set_handler_data() to
set jim_handler_data, so remove it.
Change-Id: Icc323faf754b0546a72208f90abd9e68ff2ef52f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5667
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Now that target override is uniformly implemented for all types of
commands, there is no need for target-prefixed "native" commands
(.jim_handler) to sneakily extract the overridden target from the
struct command.
Modify the commands to use the standard API get_current_target().
Change-Id: I732a09c3261e56524edd5217634fa409eb97a8c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5666
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
While registering a new command, jim accepts a pointer to command's
private data that will be accessible during the command execution.
Today openocd is not consistent and passes different private data
depending on the command, and then even overwrites it:
- "simple" commands (.handler) are registered with their own
struct command pointer as command private data;
- "native" commands (.jim_handler) at root level are registered
with NULL command private data;
- "native" commands (.jim_handler) not at root level are
registered with the struct command pointer of their root command
as command private data but, when executed, the command private
data is overwritten by the value in field jim_handler_data taken
from their struct command.
Uniform the usage of command private data by always set it to the
struct command pointer while registering the new commands.
Note: for multi-word commands only the root command is registered,
so command private data will be set to the struct command of the
root command. This will change later in this series when the full-
name of the command will be registered.
Don't overwrite the command private data, but let the commands that
needs jim_handler_data to get it directly through struct command.
For sake of uniformity, let function command_set_handler_data() to
set the field jim_handler_data also for "group" commands, even if
such value will not be used.
Now Jim_CmdPrivData() always returns a struct command pointer, so
wrap it in the inline function jim_to_command() to gain compile
time check on the returned type.
While there, uniform the code to use the macro Jim_CmdPrivData()
to access the command's private data pointer.
Change-Id: Idba16242ba1f6769341b4030a49cdf35a5278695
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5664
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
If current core is in EL0, it cannot use 'msr sctlr_el1, x0'
Change-Id: I04e60e39e4c84f9d9de7cc87a8e438f5d2737dc3
Signed-off-by: Cheng-Shiun Tsai <cheng.shiun.tsai@gmail.com>
Reviewed-on: http://openocd.zylin.com/6051
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The target mem_ap is a convenient way to access buses, memory and
peripherals behind an ARM AP.
The current implementation provides only access through OpenOCD
commands, because GDB remote protocol has to interact with a CPU
and has to operate on CPU states and registers.
Using GDB to access the memory is welcome, because GDB can resolve
the symbol's address from an ELF file and can nicely display the
content of complex struct and data types.
Extend mem_ap target with the bare minimal support for a remote
GDB connection, by emulating a fake basic ARM core. It means that
only a GDB that has support for ARM can be used (either 'aarch64',
'arm' or 'multiarch' GDB). This is not seen as a big limitation,
because the mem_ap target is mainly used on ARM based devices.
Add a minimalist register description for the fake CPU.
Fill the field 'debug_reason' as expected by GDB server.
Call the target halted event to reply to GDB halt requests.
For backward compatibility, don't open the GDB port by default. If
needed, it has to be specified at 'target create' or 'configure'
with the flag '-gdb-port'.
Change-Id: I5a1b7adb749746516f5d4ffc6193c47b70132364
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6034
Tested-by: jenkins
There are some breakpoint/watchpoint related code in armv8_dpm.c,
but seems not working for aarch64. Target aarch64 has its own
breakpoint implementation in aarch64.c. This commit follows the
same logic to add watchpoint support for target aarch64.
This commit also increases the size of stop_reason[] in function
gdb_signal_reply() since the old size is too small to fit in a
64-bit address, such as ffff8000115e6980.
Change-Id: I907dc0e648130e36b434220f570c37d0e8eb5ce1
Signed-off-by: Liming Sun <lsun@mellanox.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/4761
Tested-by: jenkins
Reviewed-by: Liming Sun <limings@nvidia.com>
Reviewed-by: Kevin Burke <kevinb@os.amperecomputing.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
For Zephyr rtos support it is necessary to define general register
numbers for architecture. There were some already in arc.h file.
Let's define ARC registers numbers as a set instead of separate defines.
Change-Id: I63742b8608f9556c2ec9bd2661a0fd9cf88e9b74
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/6105
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This removes some warnings which prevent a successful build with -Werror
which is enabled by default. I'm using gcc 11, so maybe others are not
getting this warnings yet.
In src/flash/nor/numicro.c the debug messages were misleadingly indented.
In src/target/arm920t.c the array size where smaller than expected from
the receiving function.
Change-Id: I66f5c6a63beb9f9416e73b726299297476c884d8
Signed-off-by: Rene Kita <git@rkta.de>
Reviewed-on: http://openocd.zylin.com/6104
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Support halting the CPU directly after a reset. If halt is
requested, the CPU stops directly at the reset vector, before
any code is executed.
This functionality was implemented using the Reset Catch
debug event.
Change-Id: If90d54c088442340376f0b588ba10267ea8e7327
Signed-off-by: Christian Hoff <christian.hoff@advantest.com>
Reviewed-on: http://openocd.zylin.com/5947
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
With zy1000 removed, there is no other implementation that uses
the minidriver, apart from the test/example minidriver-dummy.
While the idea of the minidriver is probably still valid (that is
to intercept jtag primitives before serialization), there is no
current use case, no guarantee it is really working, and the way
it was implemented (by macros and #if conditionals) is really hard
to maintain and test.
Let's let it rip in git history, from where it could eventually be
taken back in a more modern implementation.
The entry points of minidriver API are still in the code with the
original names.
Change-Id: I882e32cb26cf5842f9cba14e3badaf8948e3760d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6091
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The code for oocd_trace has been marked as deprecated in release
v0.10.0, 4 years ago.
Time to drop it!
Change-Id: I989f8345dee4ff2369bcf5e2e2ace86bbd5aa6a5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6088
Tested-by: jenkins
We do not have anymore any deprecated target name.
Drop the code to handle deprecated target names and the placehold
in struct target_type.
This patch is separated from the patch that drops the remaining
deprecated target names to be ready to revert this if there is any
need in the future.
Change-Id: I96fca7ffa39d8292f81e79f115ea45c4a30035d7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6087
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Some target name were marked as deprecated in release v0.7.0 and
v0.8.0, almost 7 years ago, and replaced with more 'actual' names.
We can reasonably expect that in these 7 years any user of OpenOCD
has already migrated to v0.8.0 or to some newer release, thus has
already updated any local/personal script to get rid of the
deprecated message.
Drop the target names already deprecated in v0.8.0.
Change-Id: I7c7491496db1b302b4eb1e9fc6090b58d4acf05a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6086
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Some command were already marked as deprecated in release v0.7.0,
more then 7 years ago, and for some of them the depredation date
is even earlier.
We can reasonably expect that in these 7 years any user of OpenOCD
has already migrated to v0.7.0 or to some following intermediate
build, thus has already updated any local/personal script to get
rid of the deprecated message.
Drop the commands already deprecated in v0.7.0.
Change-Id: I81cdc415ab855ebf30980ef5199f9780c5d7f932
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6085
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The command 'arm920t cp15i' was marked as deprecated in release
v0.4.0, almost 11 years ago.
We can reasonably expect that in these years any user of OpenOCD
has already migrated to v0.4.0 or to some newer release, thus has
already updated any local/personal script.
There is no run-time warning about the deprecation, but it is
reported in the help and in the documentation.
Drop the command already deprecated in v0.4.0.
Change-Id: I755c4283e13e125558fcd73b15fe20498eae95ca
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6083
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The command 'arm720t cp15' was marked as deprecated in release
v0.4.0, almost 11 years ago.
We can reasonably expect that in these years any user of OpenOCD
has already migrated to v0.4.0 or to some newer release, thus has
already updated any local/personal script.
There is no run-time warning about the deprecation, but it is
reported in the help and in the documentation.
Drop the command already deprecated in v0.4.0.
Change-Id: I2b325d0312d96ca5e5f0f1bad13bb162b3b75c52
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6082
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
With the removal of old tpiu code, commit 7e6556b3ca ("server:
permit the add_service function to return the created service")
http://openocd.zylin.com/5717/ can be reverted.
Fix also the new calls to add_service().
Change-Id: Ib7f2dfc6a9e829239e20313e0f121911085fdc00
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6031
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
Remove all the old tpiu code and replace it with a wrapper that
uses the new commands, prints-out the new commands and informs
about the deprecation.
All the code that handles the deprecated tpiu commands is enclosed
between the comments
/* START_DEPRECATED_TPIU */
and
/* END_DEPRECATED_TPIU */
so will be easy to remove it in the future.
Change-Id: I70b0486770128203b923346382d9a90b8ec08439
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6030
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
This is supposed to replace big part of armv7m_trace.[ch], since
TPIU is not only the one implemented in Cortex-M3 and M4.
Change-Id: I7588d16cbefe9cdb371c52fb0aa5cdfb48518804
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5858
Tested-by: jenkins
If the command 'itm port[s]' is issued before 'init', the ITM can
not be programmed because OpenOCD cannot access the target yet.
The configuration is recorded and applied after target examine.
The current test to trigger the ITM delayed-programming is based
on the TPIU configuration. This is allowed because the only use of
ITM it so send data through TPIU.
In case of system TPIU, not belonging anymore to the target, there
is no more association between target ITM and system TPIU.
Add a flag to record the pending ITM configuration requested
before 'init' and test the flag to trigger the delayed-programming
of the ITM.
Change-Id: I101eb97a116d7925cd2ff068f3e8813fc008b08e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6029
Tested-by: jenkins
The change [1] guarantees that the value pointed by 'prescaler'
gets always set, even when the adapter does not support the
specific mode requested (e.g. sync), or during trace disabling.
This works fine with the code in armv7m_trace_tpiu_config(), but
requires all the parameters to be valid also to disable the trace
(with 'enable==false'), otherwise returns error on incorrect
parameters or even causes segmentation fault if pointers
'trace_freq' or 'prescaler' are NULL.
Another problem in stlink_config_trace(), not linked with [1], is
caused by a tentative to change the settings on an already enabled
trace; the trace is disabled before the new parameters are fully
validated and in case of invalid parameters the trace is not
re-enabled.
It would be more logical to first check all the parameters, then
disable the trace, change the settings and re-enable the trace.
Practically revert [1] by checking 'enable==false' at function
entry, then disable trace and exit without any further check on
the other parameters.
For the case 'enable==true', validate all the function parameters
then disable the trace, update the trace settings and re-enable
the trace.
Modify the caller armv7m_trace_tpiu_config() to initialize the
variable 'prescaler' to a safe value to avoid the issue targeted
by [1].
[1] commit 38277fa752 ("jtag/drivers/stlink_usb: fix SWO prescaler")
Change-Id: Ia6530682162ca2c9f5ac64301f2456f70cc07ed2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5934
Tested-by: jenkins
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
pg315 of CoreSight Components:
It is recommended that the ITMEn bit is cleared and waits for the
ITMBusy bit to be cleared, before changing any fields in the
Control Register, otherwise the behavior can be unpredictable.
Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769
Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com>
Reviewed-on: http://openocd.zylin.com/6043
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines
below, before calling target_configure. This initialization is
redundant and not needed.
Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: http://openocd.zylin.com/6039
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
OpenOCD is based on a single main loop that schedules all the
activities.
At the execution of a TCL command, the timestamp is checked to
eventually trigger the polling of the targets. This means that by
executing a TCL command the polling can be triggered and detect a
change of target's state.
When openocd 'resumes' a target, the target can halt again by
hitting a breakpoint.
The 'resumed' event handler is started just after the target has
been resumed, but it triggers a polling before the execution of
its very first instruction.
If the polling finds the target halted, it will run the 'halted'
event handler, that will then be executed 'before' the pending
'resumed' handler.
In case of gdb, a 'continue' command will restart the target but,
polling (and halt detection) executed before the end of the resume
process will hide the halt. As a consequence, the gdb will not be
informed of the halt and will remains waiting as if the target is
still running without showing the prompt.
This can be verified by running on the target a firmware with a
loop, run openocd with a dummy 'resumed' event, and let gdb to set
a breakpoint in the loop. A 'continue' command will cause the
target to halt again by hitting the breakpoint at the next loop
iteration, but gdb will loose it and will not return the prompt.
openocd -f board/st_nucleo_f4.cfg -c \
'stm32f4x.cpu configure -event resumed {echo hello}'
arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c
Disable the polling while executing target's resume().
Document it and provide hints to developers to cope with future
implementation.
Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Габитов Александр Фаритович <gabitov@planarchel.ru>
Reviewed-on: http://openocd.zylin.com/6074
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Currently wp/rwp commands fail on 64-bit targets:
> wp 0xffffffff80001400 4
addr option value ('0xffffffff80001400') is not valid
Change-Id: I94d4af906b02b7bd463c8d79a6235a3646dfc434
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-on: http://openocd.zylin.com/6058
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized
we get this error:
/src/target/riscv/riscv.c: In function ‘riscv_address_translate’:
/src/target/riscv/riscv.c:1536:13: error: ‘pte’ may be used uninitialized
Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6013
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add to doxygen comment the missing parameters.
Remove from doxygen comment any non-existing parameter.
Fix the parameter names in doxygen comment to match the one in the
function prototype.
Where the parameter name in the doxygen description seems better
than the one in the code, change the code.
Escape the character '<' to prevent doxygen to interpret it as an
xml tag.
Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6002
Tested-by: jenkins
Use '@param' in front of function's parameters and '@a' when the
parameter is recalled in the description.
This fixes doxygen complains:
warning: Found unknown command '@buff16'
While there, fix a minor typo s/occured/occurred/ in a comment and
the typo s/@apram/@param/ in a doxygen comment.
Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6001
Tested-by: jenkins
In the odd case of multiple flags '-gdb-port' during 'target
create' or following 'configure', the new strdup()'ed value will
replace the old one without freeing it.
Free the old value (if it exists) before replacing it.
Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6005
Tested-by: jenkins
The target code for assert reset on cortex_a has been patched on
commit b0698501b0 ("cortex_a: fix cortex_a_assert_reset() if
srst_gates_jtag") then in cdba6ba0ad ("cortex_a: fix reset for
SWD transport") to workaround the mismatch between jtag and swd
implementations. See discussion for the second patch at
http://openocd.zylin.com/3641/
While all of these mismatches should hopefully be cleaned by the
reset framework rework, an extension of the workaround of the
second patch is required for dapdirect transports, either
dapdirect_swd and dapdirect_jtag.
Extend the existing workaround to all non-jtag transports.
Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5979
Tested-by: jenkins
If OpenOCD is reading trace data from the target, at exit it
should stop the adapter to gather data, but should left the target
still producing them.
Add a helper in armv7m_trace to disable the adapter's trace and
call it during OpenOCD teardown.
This also provides a workaround for an issue in the firmware of
ST-Link V3 till version V3J7. If the SWD connection is closed when
trace is active, at following connection the trace does not work
anymore.
Change-Id: I47ccab61405384938555096c5aca789eaa090d27
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5978
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
The use of 'void *' makes the pointer arithmetic incompatible with
standard C, even if this is allowed by GCC extensions.
The use of 'void *' can also hide incorrect pointer assignments.
Switch to 'uint8_t *' and add GCC warning flag to track any use of
pointer arithmetic extension.
Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5937
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit 80f1a92bd7 ("mips64: Add generic mips64 target support")
adds a log of the target's program counter in function
mips_mips64_debug_entry() by directly casting the little-endian
buffer in pc->value.
This is going to print an incorrect value on big-endian hosts.
Use the function buf_get_u64() to return the register value.
Not tested on real HW. Issue identified with GCC compiler flag
'-Wcast-align=strict' after change http://openocd.zylin.com/5937/
("target/register: use an array of uint8_t for register's value").
Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 80f1a92bd7 ("mips64: Add generic mips64 target support")
Reviewed-on: http://openocd.zylin.com/5944
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The original code passes to ->read_core_regs() and to
->read_xpsr() the pointer to the little-endian buffer reg.value.
This is incorrect because the two functions above require a
pointer to uint32_t, since they already run the conversion with
arm_le_to_h_u32() in the jtag callback.
This causes a mismatch on big-endian host and the registers get
read with the incorrect endianness.
Use an intermediate buffer to read the registers as uint32_t and
to track the destination reg.value pointer, then copy the value in
reg.value after the call to jtag_execute_queue().
Tested with qemu-armeb and an OpenOCD built through buildroot
configured for cortex-a7 big-endian.
Note that if jtag_execute_queue() fails, the openocd register
cache is not updated, so the already modified flags 'valid' and
'dirty' are incorrect. This part should be moved after the call to
jtag_execute_queue() too.
Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5943
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit fc2abe63fd ("armv7m: use generic arm::core_mode") adds
two special modes for ARMv6M and ARMv7M in struct arm_mode_data[].
While these modes do not have any additional register to be dumped
by command 'arm reg', the command still prints an header for these
modes but not followed by any register.
Detect the special modes for ARMv6M and ARMv7M and skip them to
avoid printing the useless header.
Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fc2abe63fd ("armv7m: use generic arm::core_mode")
Reviewed-on: http://openocd.zylin.com/5942
Tested-by: jenkins
Commit fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor
mode") introduces the secure mode 28 of ARMv6 as a synonymous of
mode 22 (MON), but does not add it in the switch/case in command
'arm reg'.
When command 'arm reg' scans the array arm_mode_data[] on targets
without secure modes, it does not detect the new secure mode as
not supported by the architecture, thus triggers a segmentation
fault when it try to read the register's value from unallocated
memory.
Issue detected with target arm926ejs.
Add the new mode in the switch/case and treat it as the mode MON.
Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: fed7131049 ("armv4_5: support weirdo ARMv6 secure monitor mode")
Reviewed-on: http://openocd.zylin.com/5941
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Real Time Transfer (RTT) is an interface specified by SEGGER based on
basic memory reads and writes to transfer data bidirectionally between
target and host.
Every target that supports so called "background memory access", which
means that the target memory can be accessed by the debugger while the
target is running, can be used.
RTT is especially of interest for targets which do not support Serial
Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is
not possible (e.g. real-time applications) [1].
The data transfer is organized in channels where each channel consists
of an up- and/or down-channel. See [2] for more details.
Channels are exposed via TCP connections. One or more RTT server can be
assigned to each channel to make them accessible to an unlimited number
of TCP connections.
The current implementation does not respect buffer flags which are used
to determine what happens when writing to a full buffer.
Note that the implementation is designed in a way that the RTT
operations can be directly performed by an adapter (e.g. J-Link).
[1] https://devzone.nordicsemi.com/tutorials/6/
[2] https://www.segger.com/jlink-rtt.html
Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4055
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reading of DPIDR is the very first operation after JTAG to SWD sequence.
Without this change if DPIDR read fails then swd connect fails.
Keep trying JTAG to SWD sequence and DPIDR read until success
or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport
mostly unnecessary.
Also test for ERROR_WAIT (which should not occur according to
IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled
then issue abort to make the next connect possible.
Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set.
Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case
of SWD transport calls swd_queue_dp_read(). It starts
with swd_check_reconnect() and it calls swd_connect() because
dap->do_reconnect is set. swd_connect() does some initialization,
reads DPIDR and calls dap_dp_init() again!
Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert()
one level of recursion is necessary to reconnect the target.
Introduce dap_dp_init_or_reconnect() for use in cortex_m reset
and similar.
Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion.
Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5729
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5876
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
If a Cortex-M (not M0, M0+) target was stopped in the middle of
a conditional IT block or in the load/store multiple instruction,
cortex_m_debug_entry() used wrong xPSR bits to detect it and then
cleared 8 bits of the exception number from xPSR
- probably wrong bit mask again.
I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no
reason as Cortex-M does not use instruction injecting.
Remove the wrong code.
The change was originally a part of http://openocd.zylin.com/4862
It is now re-submitted as #4862 is not ready.
Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5874
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Register xPSR is indexed directly with its value 16 or with the
incorrect enum ARMV7M_xPSR.
Replace them with the new enum ARMV7M_REGSEL_xPSR.
Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5873
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Consolidate low level register read/write.
Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.
Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.
Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Move primask/basepri/faultmask/control packing/unpacking from
cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg()
and armv7m_write_core_reg() where also the FP 32/64-bit registers
conversion takes place.
Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL
for packing/unpacking of special registers in the register cache.
The new packing/unpacking is endianess safe.
While on it improve returned error codes and LOG_ messages.
Just minimal changes in cortex_m.c and hla_target.c, will be
consolidated in the next patch.
Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5863
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Make arm register id coherent with reg_list index.
Without this reg_list[ARMV7M_R12] was possible but
reg_list[ARMV7M_FPSCR] was out of bounds.
Remove unused items from reg_list index.
Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5862
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Define a new enum with DCRSR.REGSEL selectors.
Introduce armv7m_map_id_to_regsel() to unify mapping in one place.
Use DCRSR.REGSEL selectors for low level register read/write.
Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5327
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
Antonio Borneo
Tim Newsome
Tomas Vanek
Bohdan Tymkiv
Yasushi SHOJI
Jan Matyas
Andreas Fritiofson
Tarek BOCHKATI
Kevin Burke
root
Florian Fainelli
Jan Matyas
Daniel Goehring
Marc Schink
Jesse Sheridan
R. Diez
Chengyu Zheng
micbis
Christian Hoff
Florian Meister
Cheng-Shiun Tsai
Liming Sun
Evgeniy Didin
Rene Kita
Adrian Negreanu
Peter Mamonov
Tarek BOCHKATI