target/cortex_m: rename CamelCase symbol
Change-Id: I67d803e15ba9fd08f2b31361fb3604275e483605 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6339 Tested-by: jenkins Reviewed-by: Marc Schink <dev@zapb.de> Reviewed-by: Xiang W <wxjstz@126.com>
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@ -2286,7 +2286,7 @@ static int stlink_usb_write_reg(void *handle, unsigned int regsel, uint32_t val)
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if (res != ERROR_OK)
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return res;
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return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WnR | (regsel & 0x7f));
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return stlink_usb_write_debug_reg(h, DCB_DCRSR, DCRSR_WNR | (regsel & 0x7f));
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/* FIXME: poll DHCSR.S_REGRDY after write DCRSR */
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}
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@ -169,7 +169,7 @@ static int cortex_m_store_core_reg_u32(struct target *target,
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if (retval != ERROR_OK)
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return retval;
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retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WnR);
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retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WNR);
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if (retval != ERROR_OK)
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return retval;
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@ -77,7 +77,7 @@ struct cortex_m_part_info {
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#define DCB_DEMCR 0xE000EDFC
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#define DCB_DSCSR 0xE000EE08
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#define DCRSR_WnR BIT(16)
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#define DCRSR_WNR BIT(16)
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#define DWT_CTRL 0xE0001000
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#define DWT_CYCCNT 0xE0001004
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