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target/armv7m: rework Cortex-M register handling part 2 

Make arm register id coherent with reg_list index.
Without this reg_list[ARMV7M_R12] was possible but
reg_list[ARMV7M_FPSCR] was out of bounds.

Remove unused items from reg_list index.

Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5862
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Christopher Head <chead@zaber.com>
This commit is contained in:
Tomas Vanek 2020-10-14 16:52:09 +02:00 committed by Antonio Borneo
parent efbc447ed8
commit e4160bd422
2 changed files with 3 additions and 37 deletions
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2
src/target/armv7m.c
View File

@ -254,6 +254,7 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r,
struct armv7m_common *armv7m = target_to_armv7m(target);
assert(num < (int)armv7m->arm.core_cache->num_regs);
assert(num == (int)r->number);
armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info;
@ -293,6 +294,7 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
struct armv7m_common *armv7m = target_to_armv7m(target);
assert(num < (int)armv7m->arm.core_cache->num_regs);
assert(num == (int)r->number);
armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info;

38
src/target/armv7m.h
View File

@ -133,40 +133,6 @@ enum {
ARMV7M_FAULTMASK,
ARMV7M_CONTROL,
/* 32bit Floating-point registers */
ARMV7M_S0,
ARMV7M_S1,
ARMV7M_S2,
ARMV7M_S3,
ARMV7M_S4,
ARMV7M_S5,
ARMV7M_S6,
ARMV7M_S7,
ARMV7M_S8,
ARMV7M_S9,
ARMV7M_S10,
ARMV7M_S11,
ARMV7M_S12,
ARMV7M_S13,
ARMV7M_S14,
ARMV7M_S15,
ARMV7M_S16,
ARMV7M_S17,
ARMV7M_S18,
ARMV7M_S19,
ARMV7M_S20,
ARMV7M_S21,
ARMV7M_S22,
ARMV7M_S23,
ARMV7M_S24,
ARMV7M_S25,
ARMV7M_S26,
ARMV7M_S27,
ARMV7M_S28,
ARMV7M_S29,
ARMV7M_S30,
ARMV7M_S31,
/* 64bit Floating-point registers */
ARMV7M_D0,
ARMV7M_D1,
@ -185,10 +151,8 @@ enum {
ARMV7M_D14,
ARMV7M_D15,
/* Floating-point status registers */
ARMV7M_FPSID,
/* Floating-point status register */
ARMV7M_FPSCR,
ARMV7M_FPEXC,
ARMV7M_LAST_REG,
};