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openocd: manually fix Yoda conditions 

Fix the remaining Yoda conditions, detected by checkpatch but not
fixed automatically.

While there, apply minor style changes.

Change-Id: I6e1978b89c4d56a20aceaeb2b52968eb6384432a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6356
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Xiang W <wxjstz@126.com>
This commit is contained in:
Antonio Borneo 2021-07-03 18:18:57 +02:00
parent 28c24a5c41
commit 20b29b7767
20 changed files with 126 additions and 170 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/flash/nand/at91sam9.c
View File

@ -383,7 +383,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
oob_data = at91sam9_oob_init(nand, oob, &oob_size);
retval = nand_read_data_page(nand, oob_data, oob_size);
if (ERROR_OK == retval && data) {
if (retval == ERROR_OK && data) {
target_read_u32(target, info->ecc + AT91C_ECCX_SR, &status);
if (status & 1) {
LOG_ERROR("Error detected!");

10
src/flash/nor/at91sam3.c
View File

@ -3626,7 +3626,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
who = -1;
break;
case 2:
if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all")))
if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0))
who = -1;
else {
uint32_t v32;
@ -3636,7 +3636,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
break;
}
if (0 == strcmp("show", CMD_ARGV[0])) {
if (strcmp("show", CMD_ARGV[0]) == 0) {
if (who == -1) {
showall:
r = ERROR_OK;
@ -3664,10 +3664,10 @@ showall:
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (0 == strcmp("set", CMD_ARGV[0]))
if (strcmp("set", CMD_ARGV[0]) == 0)
r = flashd_set_gpnvm(&(chip->details.bank[0]), who);
else if ((0 == strcmp("clr", CMD_ARGV[0])) ||
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
else if ((strcmp("clr", CMD_ARGV[0]) == 0) ||
(strcmp("clear", CMD_ARGV[0]) == 0)) /* quietly accept both */
r = flashd_clr_gpnvm(&(chip->details.bank[0]), who);
else {
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);

10
src/flash/nor/at91sam4.c
View File

@ -3173,7 +3173,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
who = -1;
break;
case 2:
if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all")))
if ((strcmp(CMD_ARGV[0], "show") == 0) && (strcmp(CMD_ARGV[1], "all") == 0))
who = -1;
else {
uint32_t v32;
@ -3183,7 +3183,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
break;
}
if (0 == strcmp("show", CMD_ARGV[0])) {
if (strcmp("show", CMD_ARGV[0]) == 0) {
if (who == -1) {
showall:
r = ERROR_OK;
@ -3211,10 +3211,10 @@ showall:
return ERROR_COMMAND_SYNTAX_ERROR;
}
if (0 == strcmp("set", CMD_ARGV[0]))
if (strcmp("set", CMD_ARGV[0]) == 0)
r = flashd_set_gpnvm(&(chip->details.bank[0]), who);
else if ((0 == strcmp("clr", CMD_ARGV[0])) ||
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
else if ((strcmp("clr", CMD_ARGV[0]) == 0) ||
(strcmp("clear", CMD_ARGV[0]) == 0)) /* quietly accept both */
r = flashd_clr_gpnvm(&(chip->details.bank[0]), who);
else {
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);

8
src/flash/nor/max32xxx.c
View File

@ -801,7 +801,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
info = bank->driver_priv;
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) {
LOG_WARNING("Error parsing address");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
@ -809,7 +809,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
/* Mask off the top portion on the address */
addr = (addr & 0x0FFFFFFF);
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) {
LOG_WARNING("Error parsing length");
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
return ERROR_FAIL;
@ -857,7 +857,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
info = bank->driver_priv;
/* Convert the range to the page numbers */
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
if (sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr) != 1) {
LOG_WARNING("Error parsing address");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;
@ -865,7 +865,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
/* Mask off the top portion on the address */
addr = (addr & 0x0FFFFFFF);
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
if (sscanf(CMD_ARGV[2], "0x%"SCNx32, &len) != 1) {
LOG_WARNING("Error parsing length");
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
return ERROR_FAIL;

28
src/flash/nor/msp432.c
View File

@ -315,8 +315,8 @@ static int msp432_init(struct flash_bank *bank)
}
/* Issue warnings if this is a device we may not be able to flash */
if (MSP432P401X_GUESS == msp432_bank->device_type ||
MSP432P411X_GUESS == msp432_bank->device_type) {
if (msp432_bank->device_type == MSP432P401X_GUESS ||
msp432_bank->device_type == MSP432P411X_GUESS) {
/* Explicit device type check failed. Report this. */
LOG_WARNING(
"msp432: Unrecognized MSP432P4 Device ID and Hardware "
@ -489,9 +489,9 @@ COMMAND_HANDLER(msp432_mass_erase_command)
all = false;
} else if (2 == CMD_ARGC) {
/* Check argument for how much to erase */
if (0 == strcmp(CMD_ARGV[1], "main"))
if (strcmp(CMD_ARGV[1], "main") == 0)
all = false;
else if (0 == strcmp(CMD_ARGV[1], "all"))
else if (strcmp(CMD_ARGV[1], "all") == 0)
all = true;
else
return ERROR_COMMAND_SYNTAX_ERROR;
@ -543,9 +543,9 @@ COMMAND_HANDLER(msp432_bsl_command)
}
if (2 == CMD_ARGC) {
if (0 == strcmp(CMD_ARGV[1], "lock"))
if (strcmp(CMD_ARGV[1], "lock") == 0)
msp432_bank->unlock_bsl = false;
else if (0 == strcmp(CMD_ARGV[1], "unlock"))
else if (strcmp(CMD_ARGV[1], "unlock") == 0)
msp432_bank->unlock_bsl = true;
else
return ERROR_COMMAND_SYNTAX_ERROR;
@ -597,8 +597,8 @@ static int msp432_erase(struct flash_bank *bank, unsigned int first,
struct msp432_bank *msp432_bank = bank->driver_priv;
struct msp432_algo_params algo_params;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
@ -676,7 +676,7 @@ static int msp432_write(struct flash_bank *bank, const uint8_t *buffer,
long long start_ms;
long long elapsed_ms;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
@ -812,8 +812,8 @@ static int msp432_probe(struct flash_bank *bank)
uint32_t size;
unsigned int num_sectors;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval;
@ -960,8 +960,8 @@ static int msp432_auto_probe(struct flash_bank *bank)
{
struct msp432_bank *msp432_bank = bank->driver_priv;
bool is_main = FLASH_BASE == bank->base;
bool is_info = P4_FLASH_INFO_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
bool is_info = bank->base == P4_FLASH_INFO_BASE;
int retval = ERROR_OK;
@ -1030,7 +1030,7 @@ static int msp432_protect_check(struct flash_bank *bank)
static void msp432_flash_free_driver_priv(struct flash_bank *bank)
{
bool is_main = FLASH_BASE == bank->base;
bool is_main = bank->base == FLASH_BASE;
/* A single private struct is shared between main and info banks */
/* Only free it on the call for main bank */

4
src/flash/nor/tms470.c
View File

@ -296,9 +296,9 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
int i;
for (i = 0; i < 4; i++) {
int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0;
int start = (strncmp(CMD_ARGV[i], "0x", 2) == 0) ? 2 : 0;
if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flash_keys[i])) {
if (sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flash_keys[i]) != 1) {
command_print(CMD, "could not process flash key %s",
CMD_ARGV[i]);
LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);

4
src/helper/fileio.c
View File

@ -198,7 +198,7 @@ int fileio_read_u32(struct fileio *fileio, uint32_t *data)
retval = fileio_local_read(fileio, sizeof(uint32_t), buf, &size_read);
if (ERROR_OK == retval && sizeof(uint32_t) != size_read)
if (retval == ERROR_OK && sizeof(uint32_t) != size_read)
retval = -EIO;
if (retval == ERROR_OK)
*data = be_to_h_u32(buf);
@ -252,7 +252,7 @@ int fileio_write_u32(struct fileio *fileio, uint32_t data)
retval = fileio_write(fileio, 4, buf, &size_written);
if (ERROR_OK == retval && size_written != sizeof(uint32_t))
if (retval == ERROR_OK && size_written != sizeof(uint32_t))
retval = -EIO;
return retval;

2
src/helper/log.c
View File

@ -290,7 +290,7 @@ void log_init(void)
if (NULL != debug_env) {
int value;
int retval = parse_int(debug_env, &value);
if (ERROR_OK == retval &&
if (retval == ERROR_OK &&
debug_level >= LOG_LVL_SILENT &&
debug_level <= LOG_LVL_DEBUG_IO)
debug_level = value;

8
src/jtag/aice/aice_usb.c
View File

@ -1929,12 +1929,12 @@ static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
instructions[2] = DSB;
instructions[3] = BEQ_MINUS_12;
} else {
if (FS0 <= num && num <= FS31) { /* single precision */
if (num >= FS0 && num <= FS31) { /* single precision */
instructions[0] = FMFSR(0, nds32_reg_sr_index(num));
instructions[1] = MTSR_DTR(0);
instructions[2] = DSB;
instructions[3] = BEQ_MINUS_12;
} else if (FD0 <= num && num <= FD31) { /* double precision */
} else if (num >= FD0 && num <= FD31) { /* double precision */
instructions[0] = FMFDR(0, nds32_reg_sr_index(num));
instructions[1] = MTSR_DTR(0);
instructions[2] = DSB;
@ -2035,12 +2035,12 @@ static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
} else if (num == FPCFG) {
/* FPCFG is readonly */
} else {
if (FS0 <= num && num <= FS31) { /* single precision */
if (num >= FS0 && num <= FS31) { /* single precision */
instructions[0] = MFSR_DTR(0);
instructions[1] = FMTSR(0, nds32_reg_sr_index(num));
instructions[2] = DSB;
instructions[3] = BEQ_MINUS_12;
} else if (FD0 <= num && num <= FD31) { /* double precision */
} else if (num >= FD0 && num <= FD31) { /* double precision */
instructions[0] = MFSR_DTR(0);
instructions[1] = FMTDR(0, nds32_reg_sr_index(num));
instructions[2] = DSB;

2
src/jtag/drivers/versaloon/versaloon.c
View File

@ -212,7 +212,7 @@ RESULT versaloon_send_command(uint16_t out_len, uint16_t *inlen)
ret = libusb_bulk_transfer(versaloon_usb_device_handle,
versaloon_interface.usb_setting.ep_out,
versaloon_buf, out_len, &transferred, versaloon_usb_to);
if (0 != ret || transferred != out_len) {
if (ret != 0 || transferred != out_len) {
LOG_ERROR(ERRMSG_FAILURE_OPERATION, "send usb data");
return ERRCODE_FAILURE_OPERATION;
}

10
src/jtag/drivers/xds110.c
View File

@ -379,8 +379,8 @@ static bool usb_connect(void)
/* Get the device's serial number string */
result = libusb_get_string_descriptor_ascii(dev,
desc.iSerialNumber, data, max_data);
if (0 < result &&
0 == strcmp((char *)data, (char *)xds110.serial)) {
if (result > 0 &&
strcmp((char *)data, (char *)xds110.serial) == 0) {
found = true;
break;
}
@ -497,7 +497,7 @@ static bool usb_write(unsigned char *buffer, int size, int *written)
result = libusb_bulk_transfer(xds110.dev, xds110.endpoint_out, buffer,
size, &bytes_written, 0);
while (LIBUSB_ERROR_PIPE == result && retries < 3) {
while (result == LIBUSB_ERROR_PIPE && retries < 3) {
/* Try clearing the pipe stall and retry transfer */
libusb_clear_halt(xds110.dev, xds110.endpoint_out);
result = libusb_bulk_transfer(xds110.dev, xds110.endpoint_out, buffer,
@ -508,7 +508,7 @@ static bool usb_write(unsigned char *buffer, int size, int *written)
if (NULL != written)
*written = bytes_written;
return (0 == result && size == bytes_written) ? true : false;
return (result == 0 && size == bytes_written) ? true : false;
}
static bool usb_get_response(uint32_t *total_bytes_read, uint32_t timeout)
@ -1021,7 +1021,7 @@ static bool xds_set_supply(uint32_t voltage)
xds110.write_payload[0] = XDS_SET_SUPPLY;
xds110_set_u32(volts_pntr, voltage);
*source_pntr = (uint8_t)(0 != voltage ? 1 : 0);
*source_pntr = (uint8_t)(voltage != 0 ? 1 : 0);
success = xds_execute(XDS_OUT_LEN + 5, XDS_IN_LEN, DEFAULT_ATTEMPTS,
DEFAULT_TIMEOUT);

2
src/jtag/tcl.c
View File

@ -133,7 +133,7 @@ static int jim_command_drscan(Jim_Interp *interp, int argc, Jim_Obj * const *arg
/* get arg as a string. */
cp = Jim_GetString(args[i], NULL);
/* is it the magic? */
if (0 == strcmp("-endstate", cp)) {
if (strcmp("-endstate", cp) == 0) {
/* is the statename valid? */
cp = Jim_GetString(args[i + 1], NULL);

160
src/rtos/mqx.c
View File

@ -199,28 +199,22 @@ static int mqx_is_scheduler_running(
uint32_t capability_value = 0;
/* get '_mqx_kernel_data' symbol */
if (ERROR_OK != mqx_get_symbol(
rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_symbol
)) {
if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_symbol) != ERROR_OK)
return ERROR_FAIL;
}
/* get '_mqx_kernel_data' */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_symbol, 0, 4,
"_mqx_kernel_data", &kernel_data_addr
)) {
if (mqx_get_member(rtos, kernel_data_symbol, 0, 4,
"_mqx_kernel_data", &kernel_data_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* return if '_mqx_kernel_data' is NULL or default 0xFFFFFFFF */
if (0 == kernel_data_addr || (uint32_t)(-1) == kernel_data_addr)
if (kernel_data_addr == 0 || kernel_data_addr == (uint32_t)(-1))
return ERROR_FAIL;
/* get kernel_data->ADDRESSING_CAPABILITY */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_addr, MQX_KERNEL_OFFSET_CAPABILITY, 4,
"kernel_data->ADDRESSING_CAPABILITY", (void *)&capability_value
)) {
if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_CAPABILITY, 4,
"kernel_data->ADDRESSING_CAPABILITY", (void *)&capability_value) != ERROR_OK)
return ERROR_FAIL;
}
/* check first member, the '_mqx_kernel_data->ADDRESSING_CAPABILITY'.
it suppose to be set to value 8 */
if (capability_value != 8) {
@ -228,12 +222,10 @@ static int mqx_is_scheduler_running(
return ERROR_FAIL;
}
/* get active ptr */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4,
"kernel_data->ACTIVE_PTR", (void *)&active_td_addr
)) {
if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4,
"kernel_data->ACTIVE_PTR", (void *)&active_td_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* active task is system task, scheduler has not not run yet */
system_td_addr = kernel_data_addr + MQX_KERNEL_OFFSET_SYSTEM_TASK;
if (active_td_addr == system_td_addr) {
@ -302,33 +294,25 @@ static int mqx_update_threads(
if (ERROR_OK != mqx_is_scheduler_running(rtos))
return ERROR_FAIL;
/* get kernel_data symbol */
if (ERROR_OK != mqx_get_symbol(
rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr
)) {
if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* read kernel_data */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_addr, 0, 4, "_mqx_kernel_data", &kernel_data_addr
)) {
if (mqx_get_member(rtos, kernel_data_addr, 0, 4,
"_mqx_kernel_data", &kernel_data_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* get task queue address */
task_queue_addr = kernel_data_addr + MQX_KERNEL_OFFSET_TDLIST;
/* get task queue size */
if (ERROR_OK != mqx_get_member(
rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2,
"kernel_data->TD_LIST.SIZE", &task_queue_size
)) {
if (mqx_get_member(rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2,
"kernel_data->TD_LIST.SIZE", &task_queue_size) != ERROR_OK)
return ERROR_FAIL;
}
/* get active ptr */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4,
"kernel_data->ACTIVE_PTR", (void *)&active_td_addr
)) {
if (mqx_get_member(rtos, kernel_data_addr, MQX_KERNEL_OFFSET_ACTIVE_TASK, 4,
"kernel_data->ACTIVE_PTR", (void *)&active_td_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* setup threads info */
rtos->thread_count = task_queue_size;
@ -355,60 +339,46 @@ static int mqx_update_threads(
char *state_name = "Unknown";
/* set current taskpool address */
if (ERROR_OK != mqx_get_member(
rtos, taskpool_addr, MQX_TASK_OFFSET_NEXT, 4,
"td_struct_ptr->NEXT", &taskpool_addr
)) {
if (mqx_get_member(rtos, taskpool_addr, MQX_TASK_OFFSET_NEXT, 4,
"td_struct_ptr->NEXT", &taskpool_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* get task address from taskpool */
task_addr = taskpool_addr - MQX_TASK_OFFSET_TDLIST;
/* get address of 'td_struct_ptr->TEMPLATE_LIST_PTR' */
if (ERROR_OK != mqx_get_member(
rtos, task_addr, MQX_TASK_OFFSET_TEMPLATE, 4,
"td_struct_ptr->TEMPLATE_LIST_PTR", &task_template
)) {
if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_TEMPLATE, 4,
"td_struct_ptr->TEMPLATE_LIST_PTR", &task_template) != ERROR_OK)
return ERROR_FAIL;
}
/* get address of 'td_struct_ptr->TEMPLATE_LIST_PTR->NAME' */
if (ERROR_OK != mqx_get_member(
rtos, task_template, MQX_TASK_TEMPLATE_OFFSET_NAME, 4,
"td_struct_ptr->TEMPLATE_LIST_PTR->NAME", &task_name_addr
)) {
if (mqx_get_member(rtos, task_template, MQX_TASK_TEMPLATE_OFFSET_NAME, 4,
"td_struct_ptr->TEMPLATE_LIST_PTR->NAME", &task_name_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* get value of 'td_struct->TEMPLATE_LIST_PTR->NAME' */
if (ERROR_OK != mqx_get_member(
rtos, task_name_addr, 0, MQX_THREAD_NAME_LENGTH,
"*td_struct_ptr->TEMPLATE_LIST_PTR->NAME", task_name
)) {
if (mqx_get_member(rtos, task_name_addr, 0, MQX_THREAD_NAME_LENGTH,
"*td_struct_ptr->TEMPLATE_LIST_PTR->NAME", task_name) != ERROR_OK)
return ERROR_FAIL;
}
/* always terminate last character by force,
otherwise openocd might fail if task_name
has corrupted data */
task_name[MQX_THREAD_NAME_LENGTH] = '\0';
/* get value of 'td_struct_ptr->TASK_ID' */
if (ERROR_OK != mqx_get_member(
rtos, task_addr, MQX_TASK_OFFSET_ID, 4,
"td_struct_ptr->TASK_ID", &task_id
)) {
if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ID, 4,
"td_struct_ptr->TASK_ID", &task_id) != ERROR_OK)
return ERROR_FAIL;
}
/* get task errno */
if (ERROR_OK != mqx_get_member(
rtos, task_addr, MQX_TASK_OFFSET_ERROR_CODE, 4,
"td_struct_ptr->TASK_ERROR_CODE", &task_errno
)) {
if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ERROR_CODE, 4,
"td_struct_ptr->TASK_ERROR_CODE", &task_errno) != ERROR_OK)
return ERROR_FAIL;
}
/* get value of 'td_struct_ptr->STATE' */
if (ERROR_OK != mqx_get_member(
rtos, task_addr, MQX_TASK_OFFSET_STATE, 4,
"td_struct_ptr->STATE", &task_state
)) {
if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_STATE, 4,
"td_struct_ptr->STATE", &task_state) != ERROR_OK)
return ERROR_FAIL;
}
task_state &= MQX_TASK_STATE_MASK;
/* and search for defined state */
for (state_index = 0; state_index < ARRAY_SIZE(mqx_states); state_index++) {
@ -471,26 +441,21 @@ static int mqx_get_thread_reg_list(
if (ERROR_OK != mqx_is_scheduler_running(rtos))
return ERROR_FAIL;
/* get kernel_data symbol */
if (ERROR_OK != mqx_get_symbol(
rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr
)) {
if (mqx_get_symbol(rtos, MQX_VAL_MQX_KERNEL_DATA, &kernel_data_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* read kernel_data */
if (ERROR_OK != mqx_get_member(
rtos, kernel_data_addr, 0, 4, "_mqx_kernel_data", &kernel_data_addr
)) {
if (mqx_get_member(rtos, kernel_data_addr, 0, 4,
"_mqx_kernel_data", &kernel_data_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* get task queue address */
task_queue_addr = kernel_data_addr + MQX_KERNEL_OFFSET_TDLIST;
/* get task queue size */
if (ERROR_OK != mqx_get_member(
rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2,
"kernel_data->TD_LIST.SIZE", &task_queue_size
)) {
if (mqx_get_member(rtos, task_queue_addr, MQX_QUEUE_OFFSET_SIZE, 2,
"kernel_data->TD_LIST.SIZE", &task_queue_size) != ERROR_OK)
return ERROR_FAIL;
}
/* search for taskid */
for (
uint32_t i = 0, taskpool_addr = task_queue_addr;
@ -501,21 +466,17 @@ static int mqx_get_thread_reg_list(
uint32_t task_id = 0;
/* set current taskpool address */
tmp_address = taskpool_addr;
if (ERROR_OK != mqx_get_member(
rtos, tmp_address, MQX_TASK_OFFSET_NEXT, 4,
"td_struct_ptr->NEXT", &taskpool_addr
)) {
if (mqx_get_member(rtos, tmp_address, MQX_TASK_OFFSET_NEXT, 4,
"td_struct_ptr->NEXT", &taskpool_addr) != ERROR_OK)
return ERROR_FAIL;
}
/* get task address from taskpool */
task_addr = taskpool_addr - MQX_TASK_OFFSET_TDLIST;
/* get value of td_struct->TASK_ID */
if (ERROR_OK != mqx_get_member(
rtos, task_addr, MQX_TASK_OFFSET_ID, 4,
"td_struct_ptr->TASK_ID", &task_id
)) {
if (mqx_get_member(rtos, task_addr, MQX_TASK_OFFSET_ID, 4,
"td_struct_ptr->TASK_ID", &task_id) != ERROR_OK)
return ERROR_FAIL;
}
/* found taskid, break */
if (task_id == thread_id) {
my_task_addr = task_addr;
@ -527,11 +488,10 @@ static int mqx_get_thread_reg_list(
return ERROR_FAIL;
}
/* get task stack head address */
if (ERROR_OK != mqx_get_member(
rtos, my_task_addr, MQX_TASK_OFFSET_STACK, 4, "task->STACK_PTR", &stack_ptr
)) {
if (mqx_get_member(rtos, my_task_addr, MQX_TASK_OFFSET_STACK, 4,
"task->STACK_PTR", &stack_ptr) != ERROR_OK)
return ERROR_FAIL;
}
return rtos_generic_stack_read(
rtos->target, ((struct mqx_params *)rtos->rtos_specific_params)->stacking_info, stack_ptr, reg_list, num_regs
);

2
src/rtos/rtos.c
View File

@ -140,7 +140,7 @@ int rtos_create(struct jim_getopt_info *goi, struct target *target)
if (e != JIM_OK)
return e;
if (0 == strcmp(cp, "auto")) {
if (strcmp(cp, "auto") == 0) {
/* Auto detect tries to look up all symbols for each RTOS,
* and runs the RTOS driver's _detect() function when GDB
* finds all symbols for any RTOS. See rtos_qsymbol(). */

2
src/target/arm_semihosting.c
View File

@ -367,7 +367,7 @@ int arm_semihosting(struct target *target, int *retval)
}
/* Check for ARM operation numbers. */
if (0 <= semihosting->op && semihosting->op <= 0x31) {
if (semihosting->op >= 0 && semihosting->op <= 0x31) {
*retval = semihosting_common(target);
if (*retval != ERROR_OK) {
LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);

23
src/target/nds32.c
View File

@ -422,7 +422,7 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target,
reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) {
if (reg_arch_info[i].num >= FD0 && reg_arch_info[i].num <= FD31) {
reg_list[i].value = reg_arch_info[i].value;
reg_list[i].type = &nds32_reg_access_type_64;
@ -456,20 +456,20 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target,
}
}
if (R16 <= reg_arch_info[i].num && reg_arch_info[i].num <= R25)
if (reg_arch_info[i].num >= R16 && reg_arch_info[i].num <= R25)
reg_list[i].caller_save = true;
else
reg_list[i].caller_save = false;
reg_list[i].feature = malloc(sizeof(struct reg_feature));
if (R0 <= reg_arch_info[i].num && reg_arch_info[i].num <= IFC_LP)
if (reg_arch_info[i].num >= R0 && reg_arch_info[i].num <= IFC_LP)
reg_list[i].feature->name = "org.gnu.gdb.nds32.core";
else if (CR0 <= reg_arch_info[i].num && reg_arch_info[i].num <= SECUR0)
else if (reg_arch_info[i].num >= CR0 && reg_arch_info[i].num <= SECUR0)
reg_list[i].feature->name = "org.gnu.gdb.nds32.system";
else if (D0L24 <= reg_arch_info[i].num && reg_arch_info[i].num <= CBE3)
else if (reg_arch_info[i].num >= D0L24 && reg_arch_info[i].num <= CBE3)
reg_list[i].feature->name = "org.gnu.gdb.nds32.audio";
else if (FPCSR <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31)
else if (reg_arch_info[i].num >= FPCSR && reg_arch_info[i].num <= FD31)
reg_list[i].feature->name = "org.gnu.gdb.nds32.fpu";
cache->num_regs++;
@ -1545,7 +1545,7 @@ int nds32_restore_context(struct target *target)
i, buf_get_u32(reg->value, 0, 32));
reg_arch_info = reg->arch_info;
if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31) {
if (reg_arch_info->num >= FD0 && reg_arch_info->num <= FD31) {
uint64_t val = buf_get_u64(reg_arch_info->value, 0, 64);
aice_write_reg_64(aice, reg_arch_info->num, val);
} else {
@ -1735,8 +1735,7 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng
* be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide
* address translation or not. */
target_addr_t physical_addr;
if (ERROR_FAIL == target->type->virt2phys(target, cur_address,
&physical_addr))
if (target->type->virt2phys(target, cur_address, &physical_addr) == ERROR_FAIL)
return ERROR_FAIL;
/* I$ invalidate */
@ -1926,8 +1925,7 @@ int nds32_examine_debug_reason(struct nds32 *nds32)
if (ERROR_OK != nds32_read_opcode(nds32, value_pc, &opcode))
return ERROR_FAIL;
if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, value_pc,
&instruction))
if (nds32_evaluate_opcode(nds32, opcode, value_pc, &instruction) != ERROR_OK)
return ERROR_FAIL;
/* hit 'break 0x7FFF' */
@ -1966,8 +1964,7 @@ int nds32_examine_debug_reason(struct nds32 *nds32)
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_IMPRECISE:
case NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE:
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE:
if (ERROR_OK != nds32->get_watched_address(nds32,
&(nds32->watched_address), reason))
if (nds32->get_watched_address(nds32, &(nds32->watched_address), reason) != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;

3
src/target/nds32_cmd.c
View File

@ -577,8 +577,7 @@ COMMAND_HANDLER(handle_nds32_decode_command)
while (i < insn_count) {
if (ERROR_OK != nds32_read_opcode(nds32, read_addr, &opcode))
return ERROR_FAIL;
if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode,
read_addr, &instruction))
if (nds32_evaluate_opcode(nds32, opcode, read_addr, &instruction) != ERROR_OK)
return ERROR_FAIL;
command_print(CMD, "%s", instruction.text);

2
src/target/nds32_disassembler.c
View File

@ -2849,7 +2849,7 @@ static uint32_t field_mask[9] = {
static uint8_t nds32_extract_field_8u(uint16_t opcode, uint32_t start, uint32_t length)
{
if (0 < length && length < 9)
if (length > 0 && length < 9)
return (opcode >> start) & field_mask[length];
return 0;

12
src/target/riscv/riscv-013.c
View File

@ -4653,10 +4653,10 @@ int riscv013_test_compliance(struct target *target)
for (unsigned int i = 1; i < 32; i = i << 1) {
riscv_reg_t testval = i | ((i + 1ULL) << 32);
riscv_reg_t testval_read;
COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_ZERO + i, testval),
COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_ZERO + i, testval) == ERROR_OK,
"GPR Writes should be supported.");
COMPLIANCE_MUST_PASS(write_abstract_arg(target, 0, 0xDEADBEEFDEADBEEF, 64));
COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i),
COMPLIANCE_TEST(register_read_direct(target, &testval_read, GDB_REGNO_ZERO + i) == ERROR_OK,
"GPR Reads should be supported.");
if (riscv_xlen(target) > 32) {
/* Dummy comment to satisfy linter, since removing the branches here doesn't actually compile. */
@ -4680,7 +4680,7 @@ int riscv013_test_compliance(struct target *target)
if (info->progbufsize >= 3) {
testvar = 0;
COMPLIANCE_TEST(ERROR_OK == register_write_direct(target, GDB_REGNO_S0, 0),
COMPLIANCE_TEST(register_write_direct(target, GDB_REGNO_S0, 0) == ERROR_OK,
"Need to be able to write S0 to test ABSTRACTAUTO");
struct riscv_program program;
COMPLIANCE_MUST_PASS(riscv_program_init(&program, target));
@ -4721,7 +4721,7 @@ int riscv013_test_compliance(struct target *target)
}
COMPLIANCE_WRITE(target, DM_ABSTRACTAUTO, 0);
COMPLIANCE_TEST(ERROR_OK == register_read_direct(target, &value, GDB_REGNO_S0),
COMPLIANCE_TEST(register_read_direct(target, &value, GDB_REGNO_S0) == ERROR_OK,
"Need to be able to read S0 to test ABSTRACTAUTO");
COMPLIANCE_TEST(testvar == value,
@ -4797,8 +4797,8 @@ int riscv013_test_compliance(struct target *target)
/* Pulse reset. */
target->reset_halt = true;
COMPLIANCE_MUST_PASS(riscv_set_current_hartid(target, 0));
COMPLIANCE_TEST(ERROR_OK == assert_reset(target), "Must be able to assert NDMRESET");
COMPLIANCE_TEST(ERROR_OK == deassert_reset(target), "Must be able to deassert NDMRESET");
COMPLIANCE_TEST(assert_reset(target) == ERROR_OK, "Must be able to assert NDMRESET");
COMPLIANCE_TEST(deassert_reset(target) == ERROR_OK, "Must be able to deassert NDMRESET");
/* Verify that most stuff is not affected by ndmreset. */
COMPLIANCE_READ(target, &testvar_read, DM_ABSTRACTCS);

2
src/target/riscv/riscv_semihosting.c
View File

@ -137,7 +137,7 @@ semihosting_result_t riscv_semihosting(struct target *target, int *retval)
semihosting->word_size_bytes = riscv_xlen(target) / 8;
/* Check for ARM operation numbers. */
if (0 <= semihosting->op && semihosting->op <= 0x31) {
if (semihosting->op >= 0 && semihosting->op <= 0x31) {
*retval = semihosting_common(target);
if (*retval != ERROR_OK) {
LOG_ERROR("Failed semihosting operation (0x%02X)", semihosting->op);