target/cortex_a: Use bool data type
Change-Id: Ieea3dc05809263aa0eba5125d52fef3fe77e9c5a Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/6289 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
parent
bb81ec8bf0
commit
076b4d708e
|
@ -1290,7 +1290,7 @@ static int cortex_a_set_breakpoint(struct target *target,
|
|||
control = ((matchmode & 0x7) << 20)
|
||||
| (byte_addr_select << 5)
|
||||
| (3 << 1) | 1;
|
||||
brp_list[brp_i].used = 1;
|
||||
brp_list[brp_i].used = true;
|
||||
brp_list[brp_i].value = (breakpoint->address & 0xFFFFFFFC);
|
||||
brp_list[brp_i].control = control;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1384,7 +1384,7 @@ static int cortex_a_set_context_breakpoint(struct target *target,
|
|||
control = ((matchmode & 0x7) << 20)
|
||||
| (byte_addr_select << 5)
|
||||
| (3 << 1) | 1;
|
||||
brp_list[brp_i].used = 1;
|
||||
brp_list[brp_i].used = true;
|
||||
brp_list[brp_i].value = (breakpoint->asid);
|
||||
brp_list[brp_i].control = control;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1450,7 +1450,7 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
|
|||
| (0 << 14)
|
||||
| (CTX_byte_addr_select << 5)
|
||||
| (3 << 1) | 1;
|
||||
brp_list[brp_1].used = 1;
|
||||
brp_list[brp_1].used = true;
|
||||
brp_list[brp_1].value = (breakpoint->asid);
|
||||
brp_list[brp_1].control = control_CTX;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1468,7 +1468,7 @@ static int cortex_a_set_hybrid_breakpoint(struct target *target, struct breakpoi
|
|||
| (brp_1 << 16)
|
||||
| (IVA_byte_addr_select << 5)
|
||||
| (3 << 1) | 1;
|
||||
brp_list[brp_2].used = 1;
|
||||
brp_list[brp_2].used = true;
|
||||
brp_list[brp_2].value = (breakpoint->address & 0xFFFFFFFC);
|
||||
brp_list[brp_2].control = control_IVA;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1507,7 +1507,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
|
|||
}
|
||||
LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_i,
|
||||
brp_list[brp_i].control, brp_list[brp_i].value);
|
||||
brp_list[brp_i].used = 0;
|
||||
brp_list[brp_i].used = false;
|
||||
brp_list[brp_i].value = 0;
|
||||
brp_list[brp_i].control = 0;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1526,7 +1526,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
|
|||
}
|
||||
LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_j,
|
||||
brp_list[brp_j].control, brp_list[brp_j].value);
|
||||
brp_list[brp_j].used = 0;
|
||||
brp_list[brp_j].used = false;
|
||||
brp_list[brp_j].value = 0;
|
||||
brp_list[brp_j].control = 0;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1551,7 +1551,7 @@ static int cortex_a_unset_breakpoint(struct target *target, struct breakpoint *b
|
|||
}
|
||||
LOG_DEBUG("rbp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, brp_i,
|
||||
brp_list[brp_i].control, brp_list[brp_i].value);
|
||||
brp_list[brp_i].used = 0;
|
||||
brp_list[brp_i].used = false;
|
||||
brp_list[brp_i].value = 0;
|
||||
brp_list[brp_i].control = 0;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -1753,7 +1753,7 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
|
|||
(byte_address_select << 5) |
|
||||
(load_store_access_control << 3) |
|
||||
(0x3 << 1) | 1;
|
||||
wrp_list[wrp_i].used = 1;
|
||||
wrp_list[wrp_i].used = true;
|
||||
wrp_list[wrp_i].value = address;
|
||||
wrp_list[wrp_i].control = control;
|
||||
|
||||
|
@ -1803,7 +1803,7 @@ static int cortex_a_unset_watchpoint(struct target *target, struct watchpoint *w
|
|||
}
|
||||
LOG_DEBUG("wrp %i control 0x%0" PRIx32 " value 0x%0" PRIx32, wrp_i,
|
||||
wrp_list[wrp_i].control, wrp_list[wrp_i].value);
|
||||
wrp_list[wrp_i].used = 0;
|
||||
wrp_list[wrp_i].used = false;
|
||||
wrp_list[wrp_i].value = 0;
|
||||
wrp_list[wrp_i].control = 0;
|
||||
retval = cortex_a_dap_write_memap_register_u32(target, armv7a->debug_base
|
||||
|
@ -3033,7 +3033,7 @@ static int cortex_a_examine_first(struct target *target)
|
|||
cortex_a->brp_list = calloc(cortex_a->brp_num, sizeof(struct cortex_a_brp));
|
||||
/* cortex_a->brb_enabled = ????; */
|
||||
for (i = 0; i < cortex_a->brp_num; i++) {
|
||||
cortex_a->brp_list[i].used = 0;
|
||||
cortex_a->brp_list[i].used = false;
|
||||
if (i < (cortex_a->brp_num-cortex_a->brp_num_context))
|
||||
cortex_a->brp_list[i].type = BRP_NORMAL;
|
||||
else
|
||||
|
@ -3051,7 +3051,7 @@ static int cortex_a_examine_first(struct target *target)
|
|||
free(cortex_a->wrp_list);
|
||||
cortex_a->wrp_list = calloc(cortex_a->wrp_num, sizeof(struct cortex_a_wrp));
|
||||
for (i = 0; i < cortex_a->wrp_num; i++) {
|
||||
cortex_a->wrp_list[i].used = 0;
|
||||
cortex_a->wrp_list[i].used = false;
|
||||
cortex_a->wrp_list[i].value = 0;
|
||||
cortex_a->wrp_list[i].control = 0;
|
||||
cortex_a->wrp_list[i].WRPn = i;
|
||||
|
|
|
@ -64,7 +64,7 @@ enum cortex_a_dacrfixup_mode {
|
|||
};
|
||||
|
||||
struct cortex_a_brp {
|
||||
int used;
|
||||
bool used;
|
||||
int type;
|
||||
uint32_t value;
|
||||
uint32_t control;
|
||||
|
@ -72,7 +72,7 @@ struct cortex_a_brp {
|
|||
};
|
||||
|
||||
struct cortex_a_wrp {
|
||||
int used;
|
||||
bool used;
|
||||
uint32_t value;
|
||||
uint32_t control;
|
||||
uint8_t WRPn;
|
||||
|
|
Loading…
Reference in New Issue