Don't call a variable num_pages if it holds the flash size. Also rearrange
flash size to num_pages calculation to avoid divide-by-zero if there will
be a device with < 1024 byte pages someday.
Change-Id: I2febea39694a2f9750de141f52ec88ae1599c086
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/211
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this at least checks the post conditions after convoluted code.
Change-Id: Idfa8cbedce5288d8bae5743687949f141dfb07b2
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/187
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Check whether the destination is in the program flash or NVM regions,
in the former case, use the normal longword mechanism, not the fast NVM
write.
Change-Id: I7366b7c8919928ee690252df83b99701776aee82
Signed-off-by: Tomas Frydrych <tomas@sleepfive.com>
Reviewed-on: http://openocd.zylin.com/194
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Before this commit, openocd used to segfault when probing flash
of an at91sam7x512 (which contains 2 banks of flash). This was due
to the way it systematically insert a new flash bank without setting
its name.
Then, when get_flash_bank_by_name_noprobe() is called, it is doing
a strcmp() on the non-initialized bank->name.
This commit prevents allocation of second probed bank if it is already
allocated (for example, if it is set in a target config file). If a
new bank really needs to be allocated, it ensures that a default name
is set.
Change-Id: I38d15bef1fda2ec746efad37171975136cf7b371
Signed-off-by: Aurelien Jacobs <aurel@gnuage.org>
Reviewed-on: http://openocd.zylin.com/171
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family
This code has been tested on SAM3U4, SAM3N4 and SAM3N1
based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>
Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
add support for checking target against the device CLASS rather
then just the PARTNO.
This change also adds the new LM4F family (Blizzard).
Change-Id: Ia9d1e33f1f1c2817c0039a2232ecf932fae072f9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/161
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
stick to convention of "retval" being used as error value to
be propagated and use "flash_flags" local variable for flash
flags read from how.
Change-Id: I63f1f2248b4f4538d6cd7634ae277f7c0aadc346
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/178
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
variable is subsequently not used
Change-Id: I177d21c6ba9f1f2e3765feffdbf317ea375a8cfe
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/149
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
found by clang, would have done something undefined and mysterious
later on.
Change-Id: If7d7aca8514575d229ed0b17378bf8b1bbf347c4
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/133
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The fix is inline with the Linux coding style that forbids
assignment in if condition
Change-Id: I10338a249bcfeff87d8596f7e17f209e26b41678
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/86
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
The fix is inline with the Linux coding style that forbids
assignment in if condition
Change-Id: I42a371d6adfdf3b3fb867705211c47d89776ee2a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/85
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Total of 5 warnings:
3x "Dead store": removed dead assignment to variable;
1x "Dereference of null pointer": this is not an error, but a
limited visibility of clang, since pointer erase_region_info
is initialized inside cfi_fixup_non_cfi();
1x "Branch condition evaluates to a garbage value":
this is a real coding bug that could issue SIGSEGV, since
"goto cleanup" can be executed before initialization
of "source".
Change-Id: Id3c323c82bb15cbd3bb8fc04b23541f11145f109
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/84
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This should silence a warning.
Change-Id: Id91a9ebacae836083b1db2654a8e7bf24b2300e9
Signed-off-by: Edgar Grimberg <edgar.grimberg@gmail.com>
Reviewed-on: http://openocd.zylin.com/52
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Let the target algorithm be running in the background and buffer data
continuously through a FIFO. This reduces or removes the effect of latency
because only a very small number of queue executions needs to be done per
buffer fill. Previously, the many repeated target state changes, register
accesses (really inefficient) and algorithm uploads caused the flash
programming to be latency bound in many cases. Now it should scale better
with increased throughput.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Access the different flash banks' registers using a bank specific register
base and a register specific offset. This is equivalent but feels more
natural.
Some accesses were discovered that maybe should not be hard coded to bank0
registers. Add a note about that.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
crc check was always performed on newly flashed data, now it is optional
flash mem can be locked by writing a specific word to a specific address in flash.
to verify flash, target must be halted, and this will (when the new halt sequence is implemented) require reseting the chip. if the target is reset after writing the lock words, then it will lock, hence the CRC will fail because it is not possible to read stuff from the target.
also added a function that resets the jtag state machine.
this is not used yet, but will be soon.
it is implemented to allow strict control over JTAG state machine, necessary to implement to halt and unlocking sequences.
Posted by telekatz@gmx.de in the bettyhacks forum for openocd
0.4.0 and integrated into 0.5.0 by Gunnar Henne.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
There are some older atmel nor chips which have negated logic for
TopBottom detection. This patch adds a special handling for the old
chips. This is the same mechanism as implemented in linux kernel.
Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
Issue warning when the old cmd is used and redirect to new supported one.
These deprecated cmds will be removed at some point.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Use consistent names for the stm32 family flash drivers, eg.
stm32x -> stm32f1x
stm32f2xxx -> stm32f2x
this makes it easier to add support for newer stm32 families.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Use "git revert <commit>" to revert this commit, then build and
repair and post patch to the mailing list.
Warnings generated with:
nios2-elf-gcc (GCC) 3.4.6 (Altera Nios II 9.1 b222)
openocd/src/target/dsp5680xx.c: In function 'eonce_rx_upper_data':
openocd/src/target/dsp5680xx.c:252: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_rx_lower_data':
openocd/src/target/dsp5680xx.c:268: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'eonce_pc_store':
openocd/src/target/dsp5680xx.c:508: warning: dereferencing type-punned
pointer will break strict-aliasing rules
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_read':
openocd/src/target/dsp5680xx.c:736: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:737: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write_8':
openocd/src/target/dsp5680xx.c:823: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_write':
openocd/src/target/dsp5680xx.c:938: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c:941: warning: cast increases required
alignment of target type
openocd/src/target/dsp5680xx.c: In function 'dsp5680xx_f_wr':
openocd/src/target/dsp5680xx.c:1355: warning: cast increases required
alignment of target type
there was a check in clearing the status register that
called exit() if the target was running. target_write_memory()
has such a check and will report the error correctly.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Update devices as per the latest programming manual.
We now use the full DEVID to identify the target. Previously we used
a 8bit id but that has now been changed in the manual.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
Fix a bunch of typos.
Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
Based on the lpc3180 driver, but released as a separate driver for two reasons:
1) I don't have an lpc3180 to test it against, so it might unintentionally break compatibility.
2) It's using a different OOB layout than lpc3180.
Rewritten so that it no longer borrows code from the NXP CDL library. Instead borrowing code from the u-boot port to lpc32xx, written by Kevin Wells.
Tested on lpc3250 (Hitex LPC3250-Stick). OOB layout is compatible with LPCLinux.
ARM11 broke with aa61a3b3d8
as the code only checked for arm 7/9.
CFI probably needs work for non-ARM targets but perhaps
not adding working area memory to e.g. MIPS will give
the default slow CFI support.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Added a Perl script to contrib that uses the header files in StellarisWare complete Firmware Development Package provided by TI/Luminary to generate a new list of device IDs
Used Perl script and revision 6734 of TI/Luminary StellarisWare to update device IDs
Hi,
I took the stm32x NOR flash driver and adapted it for the Ember EM357
chip. This chip is very similar to em351 and stm32w so the driver
should be easily extended to support those as well if anyone can get
their hands on some of those for testing.
changelog:
Added NOR flash driver em357
Best regards,
Erik Botö
Find the flash controller by position since it is before the core,
not after it.
This fixes the problem that str9xpec enable_turbo (or any other
str9xpec command) did not work. (See my post in
http://forum.sparkfun.com/viewtopic.php?f=18&t=25542)
Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages
Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end
Change LOG_USER_N calls that end with \n to LOG_USER
Do not propagate error number to user. This is for internal
programming purposes only. Error messages to the user is
reported as text via LOG_ERROR().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Every NAND driver keeps private copy of "target"
structure.
Prepare infostructure to move private "target"
copy in common/shared struct nand_device.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Table of NAND devices reports operating voltage.
Replace comma with proper decimal dot.
Øyvind: "." is correct for UK/US, but incorrect for
many other languages. OpenOCD is not localized at this
point, so sticking to "." for US/UK should be OK.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
From struct nand_flash_controller :
- remove unused field register_commands;
- remove field controller_ready, exported but
never referenced.
Remove dead code pointed by controller_ready.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
I received a number of "-Wshadow" related warnings (treated as errors) while
trying to build on OS X Leopard. In addition, there were two miscellaneous
other warnings in the flash drivers. Attached are two patches which correct
these issues and the commit messages to accompany them.
My system has the following configuration (taken from uname -a):
Darwin 9.8.0 Darwin Kernel Version 9.8.0: Wed Jul 15 16:55:01 PDT 2009;
root:xnu-1228.15.4~1/RELEASE_I386 i386
=== Werror_patch.txt Commit Message ===
compilation: fixes for -Wshadow warnings on OS X
These changes fix -Wshadow compilation warnings on OS X 10.5.8
Compiled with the following configure command:
../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi
=== flash_patch.txt Commit Message ===
compilation: fixes for flash driver warnings on OS X
These changes fix two compilation warnings on OS X 10.5.8:
../../../../src/flash/nor/at91sam3.c:2767: warning: redundant redeclaration
of 'at91sam3_flash'
../../../../src/flash/nor/at91sam3.c:101: warning: previous declaration of
'at91sam3_flash' was here
and
../../../../src/flash/nor/stmsmi.c:205: warning: format not a string literal
and no format arguments
Compiled with the following configure command:
../configure --prefix=/usr/local --enable-maintainer-mode --enable-jlink
--enable-ft2232_libftdi
===
Andrew
The flash bank name is a required element in adding flash banks,
however other than looking at the config file there is no way of
getting the name used in openocd.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
add supoort for xl family boot bank option.
The option byte handling will be cleaned up in a later patch.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This patch adds the initial dual flash bank support for devices such
as the stm32xl family.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
the unprotect fn in stm32 needs to unprotect more sectors
than was requested aligned to some boundary.
Print warning when this happens.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
some chips unprotect more than the range asked for. The
protect fn, must unprotect/protect minimally the range given.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some flash's do not support buffer writes, so we now check
they are supported before trying to use them.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The existing code used incorrect timeout values for the various cfi
operations. We now calculate the timeouts and convert to
msecs if necessary.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Modified spearsmi driver to include support for STR75x
Added missing initialization in tcl file for STR750
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
If flash chip is not listed in the table, or if no flash is
connected, pointer must be properly initialized.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
flash programming via flash write_image or gdb load would
produce a bogus error message that the flash chip was to
small.
The solution is to limit the current flash programming
run to the current chip.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
SMI interface hides the real SPI bus between SPEAr and
external flash.
Added comments to highlight the SPI operation, to help a
future rework in SPI generic and SPEAr specific drivers.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support and documentation for STMicroelectronics
SPEAr Serial Memory Interface (SMI).
Code tested on SPEAr3xx only.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
add missing error handling.
Output warning when assuming maximum flash size in the
family when failing to read.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
for non_cfi cfi chips free() was invoked on rodata.
The mystery is why this bug has survived for so long.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
sizeof() is a bit less scary than seing assumption
about size of type, no bug as such.
Use NULL instead of 0 for pointers. More obvious that
it is a pointer from code inspection.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Someone called David Carne popped up on IRC and offered a fix (as he's not
on this list so can;t post here). I am just passing it on. (thanx David)
10:54 < davidc__> Basically; the Numonyx M29W160ET has an incorrect CFI PRI
block; it describes the erase blocks backwards
10:54 < davidc__> the linked patch has a fixup for that part [really trivial]:
The patch improves flash erase for STR9x in case of a full bank erase.
Then the chip erase command is used instead which improves speed significantly.
Also I think it might help if e.g. STR912 enters some state where flash banks are locked, and a chip erase command is the key for unlocking the flash.
This flash driver works on more than just two chips.
(Though it does need work still, e.g. to protect more than 64K.
(On non-'3748-A0 chips where errata allow that.))
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
For the above targets the exit_point is
optional when used with run_algorithm, so remove it.
This makes updating the algorithm less error prone.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Review allocation of error numbers in openocd
to avoid overlap.
Put brackets around negative numbers to avoid
issues during macro expansion.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Add "static" qualifier to private functions.
Move duplicated global declarations from "target/avrt.c"
and "nor/avrf.c" to "target/avrt.h".
Remove unused declarations form "nor/avrf.c".
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Helper ./src/helper/membuf.c is only used in at91sam3.c
1) Replace membuf with LOG_*
2) The original code in sam3_GetDetails() invalidates
all the buffered output of sam3_GetInfo(). The new
code skips sam3_GetInfo() if its output should not
be printed.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
when the verify failed, it didn't return an error,
which breaks e.g. tcl scripts that rely on this for
exceptions to work.
Found by -Wshadow
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
found by code inspection. There are many other places in
CFI where LOG_ERROR() should be called similarly...
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
when a write/unlock/erase failed during write_image, then
an error was not propagated back up so e.g. flash write
image from tcl scripts would not throw an exception.
Also flash filling speed was printed even when the
operation failed. Output is now less confusing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
any read/write operation to memory can fail.
block write algorithm error propagation was broken
in that it would continue after an error was reported
writing data to ram or the algorithm failing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Hello,
"stm32x mass_erase" return ERROR_OK even if something goes wrong.
Here is a summary of changes :
* in stm32x_mass_erase : return ERROR_FLASH_OPERATION_FAILED when error
detected in FLASH_SR register;
* in COMMAND_HANDLER(stm32x_handle_mass_erase_command) : return the
returned value of stm32x_mass_erase().
I don't know if there is reason to always return ERROR_OK ?
Gaëtan
When a flash cmd is called using the flash name the autoprobe
function is not called. autoprobe is called if flash_command_get_bank
falls through to get_flash_bank_by_num.
This makes both get_flash_bank_by_name and get_flash_bank_by_num
behave the same.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This adds a virtual flash bank driver that allows virtual banks to
be defined that refer to an existing flash bank.
For example the real address for bank0 on the pic32 is 0x1fc00000
but the user program will either be in kseg0 (0xbfc00000) or
kseg1 (0x9fc00000).
This also means that gdb will be aware of all the read only flash
addresses.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Every time command "flash probe #" is executed, memory
structures are re-allocated without preventive free()
of former areas, causing memory leak.
Also, memory allocation does not check return value,
determining segmentation fault in case of out of memory.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This patch add support of iMX27 nand flash controller. This is based on
driver for imx31 nand flash controller.
OOB functionality is not fully working. As in mx31 controller, mx2 NFC
has a bug that swap two bytes between SPARE and MAIN buffer.
I used this driver for several months and no problems appear.
Page reads using hwecc4_infix layout segfaulted for check_bad_blocks because
the read assumed a valid data buffer, which check_bad_blocks does not use
(it only passes a 6 byte buffer for the start of OOB).
This version copes with undersized or missing data or oob buffers and uses
random read commands within the page to skip unwanted areas of data/OOB for
speed.
NOTE: Running check_bad_blocks with this layout will be reading infix
OOB locations, not manufacturer bad block markers. This means that if you
check blocks written in infix layout they will appear good, but manufacturer-
marked bad blocks may also appear good.
If you want to scan for manufactuer-marked bad blocks, you need to enable
raw_access before running check_bad_blocks, or use the non-infix layout.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
CC: David Brownell <dbrownell@users.sourceforge.net>
nand_build_bbt() was ignoring the return value from nand_read_page() and
blindly continuing.
It now passes the return value up to the caller if the read fails.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Change download rate messages about kibibytes from "kb/s" to "KiB/s" units.
See: http://en.wikipedia.org/wiki/Data_rate_units
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Remove few LOG_DEBUG() messages, together with code and
variables required to build such messages.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Final step to force bus_width size during CFI flash
read.
Added CFI specific implementation cfi_read() that uses
only accesses at bus_width size.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Final target is to force bus_width size during CFI flash
read.
In this first step I need to replace default flash read
with flash specific implementation.
This patch introduces:
- flash_driver_read() layer;
- default_flash_read(), backward compatible;
- read() callback in struct flash_driver;
- proper initialization in every flash_driver instance.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
During cfi_write(), head and tail of destination area
could be not aligned to bus_width.
Since write operation must be at bus_width size, source
buffer size is extended and buffer padded with current
values read from flash.
Force using bus_width to read current value from flash.
Do not use cfi_add_byte() anymore, to allow removing this
function later on.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
NOR flash structure requires each access to be bus_width wide.
Fix read of flash ID accordingly to rule above.
Add case (chip_width == 4), allowed by CFI spec and coherent
with current value of CFI_MAX_CHIP_WIDTH but currently not
used by any target.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Since NOR flash devices does not handle "byte enable lanes",
each read/write access involves the whole "chip_width".
When multiple devices are in parallel, usually all chips are
enabled during each access.
All such cases are compatible with flash accesses at
"bus_width" size.
Access at "bus_width" size is mandatory for write access to
avoid transferring of garbage values to flash.
During read access the flash controller should take care,
and discard unneeded bytes. Anyway, it is good practice to
use "bus_width" size also for read.
Every memory access that does not respect "bus_width" size
is marked with a "FIXME" comment.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Review and simplify computation of bufferwsize.
Add comments about variables' meaning.
The same code is present 3 times in the file.
Current patch updates all the 3 instances.
Step 1)
Replace "switch(bank->chip_width) {...}".
Illegal values of bank->chip_width are already dropped.
For legal values, the code is equivalent to:
bufferwsize = buffersize / bank->chip_width;
Step 2)
The above code replacement plus the following line:
bufferwsize /= (bank->bus_width / bank->chip_width);
is merged in a single formula:
bufferwsize = (buffersize / bank->chip_width) /
(bank->bus_width / bank->chip_width);
and simplified as:
bufferwsize = buffersize / bank->bus_width;
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Arguments chip_width and bus_width of command "flash bank" are
not fully checked.
While bus_width is later on redundantly checked in several other
parts (e.g. in cfi_command_val()) and generates run-time error,
chip_width is never checked, nor related to actual bus_width
value.
Added check to avoid:
- (chip_width == 0), that would mean no memory chip at all,
avoiding also division by zero e.g. in cfi_get_u8();
- (bus_width == 0), that would mean no bus at all;
- unsupported cases of chip_width or bus_width value not power
of 2;
- unsupported case of chip width wider than bus.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Last block was being skipped, fix by changing the loop test from "<" to "<="
First block argument was ignored, always started from block 0 (and counted
the wrong blocks as bad if first was nonzero). Now we use it.
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The last_block argument to nand_erase() is checked against nand->num_blocks,
but the highest valid block number is (total - 1), the test for invalid should
be ">=" rather than ">".
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
flash cmds can now be passed either the bank name or the bank number.
For example.
flash info stm32.flash
flash info 0
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Hi,
This is my first post to the list. First, I would like to thank
everyone for their work on OpenOCD, it is a great tool to work with. I
have been using it to debug code on hardware for the Rockbox project
(www.rockbox.org).
The target that I primarily work with has a Spansion/Fujitsu NOR flash
(MBM29SL800TE). I attached a patch that adds support for this flash. I
hope it can be included in the main repository. If there is something
that needs to be changed with the patch before inclusion please let me
know.
-Karl Kurbjun
The ST/Numonix M29W128G has an issue when a 0xff cmd is sent,
it cause an internal undefined state. The workaround according
to the Numonyx is to send another 0xf0 reset cmd
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
There are a million reasons why cached protection state might
be stale: power cycling of target, reset, code executing on
the target, etc.
The "flash protect_check" command is now gone. This is *always*
executed when running a "flash info".
As a bonus for more a more robust approach, lots of code could
be deleted.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This stops GDB from launching with an empty memory map,
making gdb load w/flashing fail for no obvious reason.
The error message points in the direction of the gdb-attach
event that can be set up to issue a halt or "reset init"
which will put GDB in a well defined stated upon attach
and thus have a robust flash autoprobe.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove/fix lots of bugs in handling of non-contigious sections
and out of order sections.
Fix a gaffe introduced in previous commit to src/flash/nor/core.c
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Remove bogus error messages when trying to allocate a
large chunk of target memory and then falling back to
a smaller one.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The current timeout for STM32 flash block erase and flash mass erase is
10 (ms), which is too tight, and fails around 50% of the time for me.
The data sheet for STM32F107VC specifies a maximum erase time of 40 ms
(for both operations).
I'd also consider it a bug that the code does not detect a timeout, but
just assumes that the operation has completed. The attached patch does
not address this bug.
The attached patch increases the timeouts from 10 to 100 ms. Please apply.
/Tobias
Fix a bug where write_image would fail if the sections
in the image were not in ascending order. This has previously
been fixed in gdb load.
Solved by sorting the image sections before running flash
write_image erase unlock foo.elf.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
this is done for unlocking and it is a simple omission that
it wasn't done for sectors.
The unnerving thing is that nobody has complained about this
until now....
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
If the flash has not yet been probed and GDB connects while the target is
running, the flash probe triggered by GDB's memory map read will fail. In
that case the returned memory map will be empty, causing a subsequent load
from within GDB to fail. There's not much you can do from GDB to recover,
other than a restart; a 'mon reset init' and manual 'mon flash probe' won't
help since GDB has already made up its mind about the memory map.
It seems there's no reason to require the target to be halted when probing
the flash. Remove the check to let a valid memory map be provided to GDB
even when connecting to a running target.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The The patch labeled "CFI CORE: bug-fix protect single sector" was merged
rged without some requested bugfixes. Most significantly it broke invariants
in the code, invalidating descriptions and changing the calling convention
for underlying drivers. (It (Also wasn't CFI-specific...)
Fix that, and Include an update from Antonio Borneo for the degenerate
"nothing to do" case, (although that's still in the wrong location. which
is presumably why that is it was working in some cases but not all.)
src/flash/nor/core.c | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Arguments for "flash bank" command are already
parsed and put in "bank" struct.
Removed code to parse them again.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Syntax of "flash bank" command requires:
- chip_width as CMD_ARGV[3]
- bus_width as CMD_ARGV[4]
Actual code swaps the arguments.
Bug has no run time impact since wrong variables
are only used to check value and both are checked
against same constraint.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
The command "flash bank" has updated syntax.
Add the mandatory parameter <target> to the usage message
that prints in case of error.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
jtag_get/set_end_state() is now deprecated.
There were lots of places in the code where the end state was
unintentionally modified.
The big Q is whether there were any places where the intention
was to modify the end state. 0.5 is a long way off, so we'll
get a fair amount of testing.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Until this time only basic SLC functionality exists when you want to use SLC to access external nand flash.
Basic functionality can be selected with command:
lpc3180 select 0 slc
It is anyway very slow to write/read to/from nand flash.
With the new command, SLC speed improved about 20 times, and hardware ECC info also read/written from/to nand flash OOB area:
lpc3180 select 0 slc bulk
Speed improvement achieved by using working are in SRAM of the LPC3250 chip and controlling DMA controller to interact between SRAM and SLC peripheral.
Here are the patches, and if they are ok than take them.
Tested with hitex LPC3250 usb stick.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Fixes bug that prevented users from specifying a base address of
0x80000000 or higher in image commands (flash write_image, etm image,
xscale trace_image).
image.base_address is an offset from the start address contained in
the image file (if there is one), or from 0 (for binary files). As a
signed 32-bit int, it couldn't be greater than 0x7fffffff, which is a
problem when trying to write a binary file to flash above that
address. Changing it to a 64-bit long long keeps it as a signed
offset, but allows it to cover the entire 32-bit address space.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
- without fastload: 60secs
- with fastload: 45secs
- with fastload and algorithm: 2secs.
Add new devices to supported list.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Cannot protect or unprotect single sector in cfi flash.
When first==last the procedure fails.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
At the end I have added comments /* FIXME: to be removed */
There are 3 lines in which my simplification is not complete due to
data dependency with LOG_DEBUG() messages visible in the patch.
Such log_debug has been introduced on Jan 22, 2007 with commit
4fc97d3f27 during development activity
in this file/procedure.
From my point of view, these logs can be removed, since not part of a
consistent flow of information.
Alternatively, could be borrowed in the new cfi_send_command(), but
this will increase verbosity.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
In the code a single field was all that was ever used. Makes
jtag_add_ir_scan() simpler and leaves more complicated stuff
to jtag_add_plain_ir_scan().
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
jtag_add_dr/ir_scan() now takes the tap as the first
argument, rather than for each of the fields passed
in.
The code never exercised the path where there was
more than one tap being scanned, who knows if it even
worked.
This simplifies the implementation and reduces clutter
in the calling code.
use jtag_add_ir/dr_plain_scan() for more fancy situations.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
JEDEC standard reports Vpp integer part encoded as 4 bit HEX value.
To print it using decimal digits, %u is required.
Other voltage values are coded as BCD, so %x is appropriate.
Code already prints one nibble at a time, so no need for field width
and precision in format string.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
When the beginning or end of the specified range of sectors
already has the requested protection status, don't ask the
flash driver to change those sectors.
This will among other things turn command sequences like
this into the NOPs one would expect:
flash protect_check 0
flash info 0
... reports everything as unprotected ...
flash protect 0 0 1 off
That speeds things up (by whatever work was just avoided).
Also, with Stellaris (which can't unprotect flash at page level)
this can eliminate some undesirable/false error reports. (And
finishes fixing a bug currently listed in our bug database...)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The NOR infrastructure caches some per-sector state, but
it's not used much ... because the cache is not trustworthy.
This patch addresses one part of that problem, by ensuring
that state cached by NOR drivers gets invalidated once we
resume the target -- since targets may then modify sectors.
Now if we see sector protection or erase status marked as
anything other than "unknown", we should be able to rely
on that as being accurate. (That is ... if we assume the
drivers initialize and update this state correctly.)
Another part of that problem is that the cached state isn't
much used (being unreliable, it would have been unsafe).
Those issues can be addressed in later patches.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Give a more accurate failure message when trying to unprotect; don't
complain about pages being write protected, just say that unprotect is
not supported by the hardware ... referencing the new "recover" command,
which is the way to achieve that.
Likewise, when trying to protect, talk about "pages" (matching hardware
doc) not "sectors" (an concept that's alien to these chips).
Also make the helptext for the "recover" command mention that it
also erases the device.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix some issues with the generic LPC1768 config file:
- Handle the post-reset clock config: 4 MHz internal RC, no PLL.
This affects flash and JTAG clocking.
- Remove JTAG adapter config; they don't all support trst_and_srst
- Remove the rest of the bogus "reset-init" event handler.
- Allow explicit CCLK configuration, instead of assuming 12 MHz;
some boards will use 100 Mhz (or the post-reset 4 MHz).
- Simplify: rely on defaults for endianness and IR-Capture value
- Update some comments too
Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.
Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes. Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
windows api does not define a posix sleep, use usleep that
has an openocd wrapper to the win32 native function.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- armv7m_run_algorithm now requires all algorithms to use
a software breakpoint at their exit address
- updated all algorithms to support this
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Stellaris chips have a procedure for restoring the chip to
what's effectively the "as-manufactured" state, with all the
non-volatile memory erased. That includes all flash memory,
plus things like the flash protection bits and various control
words which can for example disable debugger access. clearly,
this can be useful during development.
Luminary/TI provides an MS-Windows utility to perform this
procedure along with its Stellaris developer kits. Now OpenOCD
users will no longer need to use that MS-Windows utility.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
I have successfully programmed the AT90CAN128, based on the mega128
with some small modifications.
[ dbrownell@users.sourceforge.net: patch cleanup ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Issue warning to user when unlocking or writing the option bytes.
The new settings will not take effect until a target reset.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.
The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The "NOR: last_addr also needs correction when checking alignment"
patch omitted a necessary update to the key diagnostic; fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
According to OpenOCD error handling rules the error is
logged at where it occurs(same site where an exception
would have been thrown).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The LPC3180 NAND driver was crashing on some large page chips.
Fix:
- Crash and related functionality (don't memset too much OOB data)
- Some debug messages
- Command handling now works
[dbrownell@users.sourceforge.net: whitespace/linelength/message cleanup]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Identical to the existing 2412/2443 support except for the base address
and NFCONF value (bit 2 is reserved and should be written as 1 ref UM).
Tested on a s3c6410 board, but controller is identical in 6400/6410
except for 8bit MLC ECC support in 6410 which isn't supported by the
driver.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Using the erase bank command will cause a time out error. Replacing
this with the erase sector bank will provide a slower but safer and
stable method to erase the flash.
Signed-off-by: Laurentiu Cocanu <laurentiu.cocanu@zylin.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add a NOR flash mechanism where erase_address ranges can be padded
out to sector boundaries, triggering a diagnostic:
> flash erase_address 0x0001f980 16
address range 0x0001f980 .. 0x0001f98f is not sector-aligned
Command handler execution failed
in procedure 'flash' called at file "command.c", line 647
called at file "command.c", line 361
>
> flash erase_address pad 0x0001f980 16
Adding extra erase range, 0x0001f800 to 0x0001f97f
Adding extra erase range, 0x0001f990 to 0x0001fbff
erased address 0x0001f980 (length 16) in 0.095975s (0.163 kb/s)
>
This addresses what would otherwise be something of a functional
regression. An earlier version of the interface had a dangerous
problem: it would silently erase data outside the range it was
told to erase. Fixing that bug turned up some folk who relied on
that unsafe behavior. (The classic problem with interface bugs!)
Now they can get that behavior again. If they really need it,
just specify "pad".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add file comments to a few files. Make the GDB server use
more conventional (pointer-free) hex digit conversion.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines; fix some bad indents.
Add TODO list entry re full support for NAND/NOR bank names.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Usage messages should use the same EBNF as the User's Guide;
no angle brackets. Be more complete too ... some params were
missing. Improve and correct various helptexts.
Make user's guide refer to the NAND "driver" name, not the
controller name; that's a bit more precise.
Don't use "&function"; its name is its address. Line up struct
initializers properly. Remove some blank lines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>