NAND: lpc3180 crashes on LPC3250
The LPC3180 NAND driver was crashing on some large page chips. Fix: - Crash and related functionality (don't memset too much OOB data) - Some debug messages - Command handling now works [dbrownell@users.sourceforge.net: whitespace/linelength/message cleanup] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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@ -500,9 +500,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
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return ERROR_NAND_OPERATION_NOT_SUPPORTED;
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}
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if (oob && (oob_size > 6))
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if (oob && (oob_size > 24))
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{
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LOG_ERROR("LPC3180 MLC controller can't write more than 6 bytes of OOB data");
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LOG_ERROR("LPC3180 MLC controller can't write more "
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"than 6 bytes for each quarter's OOB data");
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return ERROR_NAND_OPERATION_NOT_SUPPORTED;
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}
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@ -559,10 +560,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
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data += thisrun_data_size;
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}
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memset(oob_buffer, 0xff, (nand->page_size == 512) ? 6 : 24);
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memset(oob_buffer, 0xff, 6);
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if (oob)
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{
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memcpy(page_buffer, oob, thisrun_oob_size);
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memcpy(oob_buffer, oob, thisrun_oob_size);
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oob_size -= thisrun_oob_size;
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oob += thisrun_oob_size;
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}
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@ -570,8 +571,10 @@ static int lpc3180_write_page(struct nand_device *nand, uint32_t page, uint8_t *
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/* write MLC_ECC_ENC_REG to start encode cycle */
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target_write_u32(target, 0x200b8008, 0x0);
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target_write_memory(target, 0x200a8000, 4, 128, page_buffer + (quarter * 512));
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target_write_memory(target, 0x200a8000, 1, 6, oob_buffer + (quarter * 6));
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target_write_memory(target, 0x200a8000,
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4, 128, page_buffer);
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target_write_memory(target, 0x200a8000,
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1, 6, oob_buffer);
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/* write MLC_ECC_AUTO_ENC_REG to start auto encode */
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target_write_u32(target, 0x200b8010, 0x0);
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@ -760,7 +763,6 @@ static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
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{
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struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
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struct target *target = lpc3180_info->target;
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uint8_t status = 0x0;
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if (target->state != TARGET_HALTED)
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{
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@ -768,20 +770,35 @@ static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
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return ERROR_NAND_OPERATION_FAILED;
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}
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LOG_DEBUG("lpc3180_controller_ready count start=%d", timeout);
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do
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{
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if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
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{
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uint8_t status;
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/* Read MLC_ISR, wait for controller to become ready */
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target_read_u8(target, 0x200b8048, &status);
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if (status & 2)
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if (status & 2) {
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LOG_DEBUG("lpc3180_controller_ready count=%d",
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timeout);
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return 1;
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}
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}
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else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
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{
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/* we pretend that the SLC controller is always ready */
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return 1;
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uint32_t status;
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/* Read SLC_STAT and check READY bit */
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target_read_u32(target, 0x20020018, &status);
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if (status & 1) {
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LOG_DEBUG("lpc3180_controller_ready count=%d",
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timeout);
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return 1;
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}
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}
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alive_sleep(1);
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@ -801,6 +818,8 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
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return ERROR_NAND_OPERATION_FAILED;
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}
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LOG_DEBUG("lpc3180_nand_ready count start=%d", timeout);
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do
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{
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if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
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@ -810,8 +829,11 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
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/* Read MLC_ISR, wait for NAND flash device to become ready */
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target_read_u8(target, 0x200b8048, &status);
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if (status & 1)
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if (status & 1) {
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LOG_DEBUG("lpc3180_nand_ready count end=%d",
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timeout);
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return 1;
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}
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}
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else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER)
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{
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@ -820,8 +842,11 @@ static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
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/* Read SLC_STAT and check READY bit */
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target_read_u32(target, 0x20020018, &status);
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if (status & 1)
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if (status & 1) {
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LOG_DEBUG("lpc3180_nand_ready count end=%d",
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timeout);
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return 1;
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}
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}
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alive_sleep(1);
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@ -844,7 +869,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
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}
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unsigned num;
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COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], num);
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COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
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struct nand_device *nand = get_nand_device_by_num(num);
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if (!nand)
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{
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