Marcelina Kościelnicka
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be9595e18f
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xilinx: Add RAMB4* blackboxes
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2022-03-21 13:11:52 +01:00 |
github-actions[bot]
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3bf1070245
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Bump version
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2022-03-19 00:12:57 +00:00 |
Miodrag Milanovic
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55eed8df57
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More verbose warnings
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2022-03-18 14:47:35 +01:00 |
Miodrag Milanović
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0c5279b73d
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Merge pull request #3236 from YosysHQ/micko/tb_initial
Recognize registers and set initial state for them in tb
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2022-03-17 17:15:36 +01:00 |
github-actions[bot]
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e1d4863a19
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Bump version
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2022-03-17 00:13:12 +00:00 |
Miodrag Milanovic
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1f3423cd7d
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Recognize registers and set initial state for them in tb
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2022-03-16 14:35:39 +01:00 |
Miodrag Milanovic
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e217e3017a
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Update sim help message.
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2022-03-16 07:55:57 +01:00 |
github-actions[bot]
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66914b6eb3
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Bump version
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2022-03-15 01:09:43 +00:00 |
YRabbit
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19b7633aca
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gowin: add support for Double Data Rate primitives
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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2022-03-14 23:14:21 +01:00 |
Miodrag Milanović
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25d6fdfea7
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Merge pull request #3232 from YosysHQ/micko/fst2tb
Added fst2tb pass for generating testbench
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2022-03-14 20:01:55 +01:00 |
Miodrag Milanovic
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f5c20b8286
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Added fst2tb pass for generating testbench
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2022-03-14 19:06:29 +01:00 |
Claire Xen
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5e2992dae2
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Merge pull request #3213 from antonblanchard/abc-typo
abc: Fix {I} and {P} substitution
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2022-03-14 16:05:23 +01:00 |
Miodrag Milanovic
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27c5bafc95
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Proper example code
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2022-03-14 15:39:11 +01:00 |
github-actions[bot]
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a502570c25
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Bump version
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2022-03-12 01:02:32 +00:00 |
Miodrag Milanović
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cbece4af0c
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Merge pull request #3229 from YosysHQ/micko/sim_date
Add date parameter to enable full date/time and version info
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2022-03-11 19:02:57 +01:00 |
Miodrag Milanović
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532343dcfa
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Merge pull request #3222 from zachjs/prune-linux-ci
Prune Linux CI builds
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2022-03-11 19:02:37 +01:00 |
Miodrag Milanović
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04de9bb655
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Merge pull request #3228 from YosysHQ/micko/disable_tests
Disable tests on most of platforms
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2022-03-11 19:02:19 +01:00 |
Claire Xenia Wolf
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e21badd4b3
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Add "sim -q" option
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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2022-03-11 16:26:11 +01:00 |
Miodrag Milanovic
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37de369ba7
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Add date parameter to enable full date/time and version info
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2022-03-11 16:01:59 +01:00 |
Claire Xenia Wolf
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be32de1caa
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Small fix in "sim" help message
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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2022-03-11 15:36:23 +01:00 |
Miodrag Milanović
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2f44683f4f
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Merge pull request #3226 from YosysHQ/micko/btor2witness
Sim support for btor2 witness files
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2022-03-11 15:29:34 +01:00 |
Miodrag Milanovic
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5204694123
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FstData already do conversion to VCD
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2022-03-11 15:21:36 +01:00 |
Miodrag Milanovic
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b72c779204
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Support cell name in btor witness file
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2022-03-11 15:11:14 +01:00 |
Claire Xenia Wolf
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d340f302f6
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Fix handling of some formal cells in btor back-end
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
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2022-03-11 14:21:12 +01:00 |
Miodrag Milanovic
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ebe2ee431e
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handle state names of $anyconst and $anyseq
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2022-03-11 14:04:02 +01:00 |
Zachary Snow
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5e7ea57d8e
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Prune Linux CI builds
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2022-03-11 12:07:48 +01:00 |
Miodrag Milanovic
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357336339a
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Proper write of memory data
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2022-03-11 11:19:53 +01:00 |
Miodrag Milanovic
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75c0391f06
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Disable tests on most of platforms
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2022-03-10 11:05:00 +01:00 |
github-actions[bot]
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eb8c61f033
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Bump version
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2022-03-10 01:11:52 +00:00 |
Lofty
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9f7a55c99f
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intel_alm: M10K write-enable is negative-true
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2022-03-09 20:18:06 +00:00 |
Miodrag Milanovic
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295b0d1899
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Start work on memory init
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2022-03-09 18:34:02 +01:00 |
Miodrag Milanovic
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f37ac5d934
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Fixes and error check
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2022-03-09 09:48:29 +01:00 |
Miodrag Milanovic
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ede348cdc2
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cleanup
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2022-03-07 16:32:32 +01:00 |
Miodrag Milanovic
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1b1ecd4ab0
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Error checks for aiger witness
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2022-03-07 15:00:14 +01:00 |
Miodrag Milanovic
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b6aca1d743
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btor2 witness co-simulation
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2022-03-07 13:59:36 +01:00 |
Miodrag Milanović
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4ccc2adbda
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Merge pull request #3210 from rqou/json-signed
json: Add help message for `signed` field
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2022-03-07 09:41:25 +01:00 |
github-actions[bot]
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7ba636cb32
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Bump version
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2022-03-05 01:06:31 +00:00 |
Miodrag Milanović
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a95e5d505b
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Merge pull request #3186 from nakengelhardt/smtbmc_sby_print_id
add argument for printing cell names in yosys-smtbmc
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2022-03-04 16:39:12 +01:00 |
Miodrag Milanović
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13655ddccf
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Merge pull request #3206 from YosysHQ/micko/quote_remove
Remove quotes if any from attribute
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2022-03-04 16:39:01 +01:00 |
Miodrag Milanović
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c3124023e4
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Merge pull request #3207 from nakengelhardt/json_escape_quotes
fix handling of escaped chars in json backend and frontend (mostly)
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2022-03-04 13:57:32 +01:00 |
Miodrag Milanovic
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7be7f5e02e
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Next dev cycle
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2022-03-04 11:37:18 +01:00 |
Miodrag Milanovic
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07a43689d8
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Release version 0.15
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2022-03-04 11:36:03 +01:00 |
Miodrag Milanovic
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66ba5ed7a5
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Update ABC
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2022-03-04 11:32:15 +01:00 |
Miodrag Milanovic
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a7090e9711
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Update documentation
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2022-03-04 10:56:33 +01:00 |
Miodrag Milanović
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9581b9adac
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Merge pull request #3219 from YosysHQ/micko/quick_vcd
VCD reader support by using external tool
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2022-03-04 10:42:14 +01:00 |
Miodrag Milanović
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d1fbe738a7
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Merge pull request #3220 from YosysHQ/claire/simstuff
Add writing of aiw files to "sim" command
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2022-03-04 10:41:02 +01:00 |
github-actions[bot]
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e768f7552c
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Bump version
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2022-03-03 01:08:21 +00:00 |
Miodrag Milanovic
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59983eda17
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Add option to ignore X only signals in output
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2022-03-02 16:02:13 +01:00 |
Miodrag Milanovic
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48b56a4f7f
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Write simulation files after simulation is performed
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2022-03-02 15:23:07 +01:00 |
Miodrag Milanovic
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3818e1160d
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Update CHANGELOG
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2022-03-02 14:26:15 +01:00 |