Commit Graph

8425 Commits

Author SHA1 Message Date
Jeff Wang 98c6bd7630 fix bug introduced by not taking all of PeterCrozier's changes in 16ea4ea6
The if(str == node->str) is in fact necessary (otherwise causes generate
for in Multiplier_2D in tests/simple/multiplier.v to fail with error
message "Right hand side of 3rd expression of generate for-loop is not
constant!"). Note: in PeterCrozier's implementation, the break only
breaks out of the switch-case, not the outer for loop.
2020-01-17 02:07:42 -05:00
Jeff Wang 8ef5c7d48c scoped enum tests 2020-01-16 18:13:30 -05:00
Jeff Wang 549deb6373 fix enum in generate blocks 2020-01-16 18:13:30 -05:00
Jeff Wang 41a0a93dcc allow enums to be declared at toplevel scope 2020-01-16 18:13:14 -05:00
Jeff Wang caf35896da enum in package test 2020-01-16 18:09:03 -05:00
Jeff Wang febe7706a2 simple enum test 2020-01-16 18:09:03 -05:00
Jeff Wang cc2236d0c0 lexer doesn't seem to return TOK_REG for logic anymore 2020-01-16 18:08:58 -05:00
Jeff Wang 5ddf84d430 allow enum typedefs 2020-01-16 17:17:42 -05:00
Jeff Wang 16ea4ea61a partial rebase of PeterCrozier's enum work onto current master
I tried to keep only the enum-related changes, and minimize the diff. (The
original commit also had a lot of work done to get typedefs working, but yosys
has diverged quite a bit since the 2018-03-09 commit, with a new typedef
implementation.) I did not include the import related changes either.

Original commit:
"Initial implementation of enum, typedef, import.  Still a WIP."
881833aa73
2020-01-16 13:51:47 -05:00
Eddie Hung 2bda51ac34
Merge pull request #1639 from YosysHQ/eddie/fix_read_xaiger
read_aiger: $lut prefix in front
2020-01-15 16:22:49 -08:00
Eddie Hung 5918ede9bd abc9: aAdd test to check $_NOT_s are absorbed 2020-01-15 14:36:05 -08:00
Eddie Hung 05c8858a90 read_aiger: $lut prefix in front 2020-01-15 14:31:32 -08:00
Miodrag Milanović abba1541bc
Merge pull request #1636 from YosysHQ/eddie/fix_synth_xilinx_W
synth_xilinx: fix default W value for non-xc7
2020-01-15 08:47:16 +01:00
Eddie Hung ffd6f54f92
Merge pull request #1635 from YosysHQ/eddie/print_stats
print_stats footer to return peak memory, option for including children
2020-01-14 14:18:42 -08:00
Eddie Hung 61ffd2d199
Merge pull request #1633 from YosysHQ/eddie/fix_autoname
autoname: do not rename ports
2020-01-14 11:40:54 -08:00
Eddie Hung 9fa0e03cc9
Merge pull request #1632 from YosysHQ/eddie/fix1630
read_aiger: uniquify wires with $aiger<autoidx> prefix
2020-01-14 11:40:40 -08:00
Eddie Hung ade57058f7 As before, only display MEM if Linux or FreeBSD 2020-01-14 11:38:48 -08:00
Eddie Hung 36d1a2c60f synth_xilinx: fix default W value for non-xc7 2020-01-14 11:34:40 -08:00
Eddie Hung a901a5fb44 print_stats footer to return peak memory, option for including children 2020-01-14 11:25:23 -08:00
Miodrag Milanović 9fbeb57bbd
Merge pull request #1623 from YosysHQ/mmicko/edif_attr
Export wire properties in EDIF
2020-01-14 19:19:32 +01:00
Eddie Hung de969adcd8 autoname: do not autoname ports 2020-01-14 10:13:29 -08:00
Eddie Hung 00964e999d autoname: add testcase with $-prefix-ed port 2020-01-14 10:13:03 -08:00
Eddie Hung f63f76c372 read_aiger: also rename "$0" 2020-01-14 09:01:53 -08:00
Eddie Hung ee95fa959a read_aiger: uniquify wires with $aiger<autoidx> prefix 2020-01-13 21:28:27 -08:00
Eddie Hung 565d349dc9 Add #1630 testcase 2020-01-13 21:27:53 -08:00
Eddie Hung 766e16b525 read_aiger: make $and/$not/$lut the prefix not suffix 2020-01-13 17:34:37 -08:00
Eddie Hung ca2f3db53f
Merge pull request #1620 from YosysHQ/eddie/abc9_scratchpad
abc9: add some scripts/options into "scratchpad"
2020-01-13 09:04:20 -08:00
Eddie Hung 0f489c5ea3
Merge pull request #1627 from YosysHQ/eddie/fix1626
synth_ice40: -abc2 to always use `abc` even if `-abc9`
2020-01-13 08:17:34 -08:00
Eddie Hung ae619ba87a Add #1626 testcase 2020-01-12 15:21:26 -08:00
Eddie Hung c0b55deb0b synth_ice40: -abc2 to always use `abc` even if `-abc9` 2020-01-12 11:26:05 -08:00
Eddie Hung 35e49fde4d Another conflict 2020-01-11 18:57:25 -08:00
Eddie Hung 58ab9f6021 write_xaiger: create holes_sigmap before modifications 2020-01-11 17:25:32 -08:00
Eddie Hung 556ed0e18a MIssed this merge conflict 2020-01-11 17:05:30 -08:00
Eddie Hung c063436eea Merge remote-tracking branch 'origin/master' into eddie/abc9_scratchpad 2020-01-11 17:02:20 -08:00
Eddie Hung 04a2eb8204
Merge pull request #1625 from YosysHQ/eddie/abc9_mfs
abc9: re-enable "&mfs" optimisation for synth_{xilinx,ecp5}
2020-01-11 13:49:24 -08:00
Eddie Hung c820682314 abc9: fix help message, found by @nakengelhardt 2020-01-11 12:11:35 -08:00
Eddie Hung 1ccee4b95e write_xaiger: sort holes by offset as well as port_id 2020-01-11 11:49:57 -08:00
Eddie Hung 45d9caf3f9 abc9: remove -nomfs option 2020-01-11 08:08:35 -08:00
Eddie Hung 93e680b7d3 Merge remote-tracking branch 'origin/master' into eddie/abc9_mfs 2020-01-11 07:59:56 -08:00
Eddie Hung 9005bb97ff Bump ABCREV for upstream fix 2020-01-11 07:59:18 -08:00
Eddie Hung d2df2a8fef
Merge pull request #1622 from YosysHQ/clifford/onpassreg
Add Pass::on_register() and Pass::on_shutdown()
2020-01-11 07:55:00 -08:00
Eddie Hung ed2aeb498e Copy-pasta 2020-01-10 15:09:42 -08:00
Eddie Hung 7d94e18100 synth_xilinx: synth_xilinx.abc9.xc7.W to replace XC7_WIRE_DELAY macro 2020-01-10 15:07:46 -08:00
Eddie Hung 291530c59f abc9: add abc9.verify and abc9.debug options 2020-01-10 15:04:13 -08:00
Eddie Hung ed491939c2
Merge pull request #1624 from YosysHQ/eddie/abc9_leak
abc9: fix memory leak
2020-01-10 11:28:38 -08:00
Eddie Hung 1f7893bd8c abc9: fix memory leak 2020-01-10 10:46:06 -08:00
Eddie Hung d1f8371481 abc9: fix typos 2020-01-10 10:00:09 -08:00
Miodrag Milanovic ccfe1e5909 this one is fine 2020-01-10 15:20:50 +01:00
Miodrag Milanovic af852a0ea8 Fix tests 2020-01-10 14:48:01 +01:00
Miodrag Milanovic 6888799c75 remove whitespace 2020-01-10 12:38:03 +01:00