Clifford Wolf
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1202f7aa4b
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Renamed "stdcells.v" to "techmap.v"
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2014-07-31 02:32:00 +02:00 |
Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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4c4b602156
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Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
Clifford Wolf
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f9946232ad
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Refactoring: Renamed RTLIL::Module::wires to wires_
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2014-07-27 01:49:51 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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3ec785b881
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Fixed manual/CHAPTER_Prog/stubnets.cc
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2014-07-23 19:36:43 +02:00 |
Clifford Wolf
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a62c21c9c6
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Removed RTLIL::SigSpec::expand() method
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2014-07-23 19:34:51 +02:00 |
Clifford Wolf
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73e0e13d2f
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Changed the $mem/$memwr WR_EN input to a per-data-bit enable signal
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2014-07-16 11:38:02 +02:00 |
Clifford Wolf
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1c81ab49e7
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small changes in presentation
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2014-07-02 06:16:31 +02:00 |
Clifford Wolf
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d26561cc44
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Tiny fix in presentation
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2014-06-29 09:27:03 +02:00 |
Clifford Wolf
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3a3f5d5923
|
Progress in presentation
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2014-06-29 09:14:49 +02:00 |
Clifford Wolf
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3e96ce8680
|
Progress in presentation
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2014-06-26 22:05:39 +02:00 |
Clifford Wolf
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a7aea17959
|
Progress in presentation
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2014-06-22 12:50:29 +02:00 |
Clifford Wolf
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072604f30f
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fixed typo
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2014-06-21 21:13:18 +02:00 |
Clifford Wolf
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b18fa95d2f
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Progress in presentation
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2014-06-21 16:33:33 +02:00 |
Clifford Wolf
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1a487303a0
|
Progress in presentation
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2014-06-14 16:45:16 +02:00 |
Clifford Wolf
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51a615b26d
|
Progress in presentation
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2014-05-06 14:42:04 +02:00 |
Anthony J. Bentley
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154c9f8b51
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Typos and grammar fixes through chapter 4.
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2014-05-02 03:08:40 -06:00 |
Anthony J. Bentley
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9c1e578afe
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Typos and grammar fixes through chapter 2.
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2014-04-11 02:42:59 -06:00 |
Anthony J. Bentley
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66a5da5edc
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POSIX find requires a path argument.
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2014-04-04 16:51:27 -06:00 |
Clifford Wolf
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79edcd4318
|
Progress in presentation
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2014-02-21 14:59:59 +01:00 |
Clifford Wolf
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2aff7b2a47
|
Progress in presentation
|
2014-02-21 02:13:02 +01:00 |
Clifford Wolf
|
9351e4d3ca
|
Progress in presentation
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2014-02-20 23:44:28 +01:00 |
Clifford Wolf
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b0e84802ec
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Progress in presentation
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2014-02-20 20:44:41 +01:00 |
Clifford Wolf
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98940260e1
|
Progress in presentation
|
2014-02-20 12:46:29 +01:00 |
Clifford Wolf
|
3d9da919d8
|
Progress in presentation
|
2014-02-18 19:51:03 +01:00 |
Clifford Wolf
|
0fbc1a59dd
|
Progress in presentation
|
2014-02-17 09:45:04 +01:00 |
Clifford Wolf
|
37cbb1ca60
|
Progress in presentation
|
2014-02-16 22:31:53 +01:00 |
Clifford Wolf
|
f08c71b96c
|
Progress in presentation
|
2014-02-16 17:56:19 +01:00 |
Clifford Wolf
|
aeb36b0b8b
|
Progress in presentation
|
2014-02-16 14:32:56 +01:00 |
Clifford Wolf
|
9c29969bbc
|
Progress in presentation
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2014-02-16 13:45:47 +01:00 |
Clifford Wolf
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4bd2d47e45
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Improved "make manual" and "make clean"
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2014-02-11 12:55:58 +01:00 |
Clifford Wolf
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fc3b3c4ec3
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Added $slice and $concat cell types
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2014-02-07 17:44:57 +01:00 |
Clifford Wolf
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821156b6cf
|
presentation progress
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2014-02-06 14:01:43 +01:00 |
Clifford Wolf
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7e9ba60df8
|
presentation progress
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2014-02-05 20:06:34 +01:00 |
Clifford Wolf
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3b5c462273
|
presentation progress
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2014-02-05 15:06:13 +01:00 |
Clifford Wolf
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9f6364c1c4
|
presentation progress
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2014-02-05 13:12:50 +01:00 |
Clifford Wolf
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e0c867db53
|
presentation progress
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2014-02-04 23:00:48 +01:00 |
Clifford Wolf
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03d63dd861
|
presentation progress
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2014-02-04 16:51:12 +01:00 |
Clifford Wolf
|
9e938aa32a
|
presentation progress
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2014-02-04 00:57:11 +01:00 |
Clifford Wolf
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6c3d767976
|
presentation progress
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2014-02-03 16:26:27 +01:00 |
Clifford Wolf
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a6750b3753
|
Added TRANSPARENT parameter to $memrd (and RD_TRANSPARENT to $mem)
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2014-02-03 13:01:45 +01:00 |
Clifford Wolf
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982c9da011
|
presentation progress
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2014-02-02 22:26:26 +01:00 |
Clifford Wolf
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6983d3f10b
|
presentation progress
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2014-02-02 17:57:14 +01:00 |
Clifford Wolf
|
0f88e28693
|
presentation progress
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2014-02-02 13:30:49 +01:00 |
Clifford Wolf
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9334c34170
|
presentation progress
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2014-02-02 13:06:28 +01:00 |
Clifford Wolf
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1c8f6f21b4
|
Progress on presentation
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2014-01-31 12:48:31 +01:00 |
Clifford Wolf
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36a808c572
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presentation progress
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2014-01-30 15:25:09 +01:00 |
Clifford Wolf
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34b39ec28a
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presentation progress
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2014-01-29 15:56:58 +01:00 |