caravel/openlane
Jeff DiCorpo 4192c34f4b
Caravan redesign (#321)
* Fixed caravan top level power routing and updated views for mag, gds and lef

* caravan(rtl): updates

~ typos fix
- remove unused pin in chip_io_alt
+ add caravan_power_routing verilog

* Apply automatic changes to Manifest and README.rst

* ~ update caravan openlane configs to add extra cell references
~ correct placment and cell names of some macro in caravan interactive script

* reharden: caravan

+ add non functional blocks
+ add an initial iteration of caravan

* Apply automatic changes to Manifest and README.rst

* Revert "Fixed caravan top level power routing and updated views for mag, gds and lef"

This reverts commit 70628f748a.

* fixed caravan top level power routing

* reharden: caravan

based on new power routing
~ guard rtl chip_io power pins in the power macro guard

* Apply automatic changes to Manifest and README.rst

* fixed caravan top level power routing

* rehadren: caravan

+ add caravan signal routing to openlane run
~ change rtl to guard power and analog against routing by
openlane by ifndef TOP_ROUTING
~ add pr bounadry for caravan signal routing to fix origin issues

* Apply automatic changes to Manifest and README.rst

* fix power connection in buffering block and regenerate gl

* Apply automatic changes to Manifest and README.rst

* updated views for caravan

* Added extract unique to lvs-gds-cell target. (#313)

* This fixes errors in the top level RTL of caravan that failed to
hook up the buffers through the SoC correctly.

* Apply automatic changes to Manifest and README.rst

* reharden: caravan

~ rtl updated

* fixed caravan mag top level

* updated views for caravan + signoff

* fixed top level cell name

* fix syntax error related to signal initialization place in caravan (#319)

* fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>

* Apply automatic changes to Manifest and README.rst

Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu>
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com>
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com>
Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com>
Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
2022-10-21 07:37:41 -07:00
..
buff_flash_clkrst Revert "add buff_flash_clkrst" 2022-10-15 08:47:02 -07:00
caravan Caravan redesign (#321) 2022-10-21 07:37:41 -07:00
caravel Caravel redesign new top (#300) 2022-10-18 17:24:07 -07:00
caravel_clocking reharden: caravel_clocking 2022-10-18 06:18:30 -07:00
chip_io add chip_io gl 2022-10-11 07:35:13 -07:00
chip_io_alt [DATA] Add user_analog_project_wrapper and chip_io_alt gds/lef views 2021-11-22 23:08:25 +02:00
constant_block Added constant block openlane files and powered gl and modified housekeeping config.tcl 2022-10-12 04:12:27 -07:00
digital_pll reharden: digital_pll 2022-10-18 07:07:32 -07:00
gpio_control_block add substrateCut layer on top of gpio_logic_high in gpio_control_block 2022-10-17 10:25:04 -07:00
gpio_defaults_block Update gpio_defaults_block to align the pins with the gpio_control_block 2021-11-05 23:27:32 +02:00
gpio_logic_high reharden!: gpio_control_block 2022-09-27 07:09:26 -07:00
gpio_signal_buffering add openlane configs for gpio_signal_buffering blocks (#305) 2022-10-19 12:30:30 -07:00
gpio_signal_buffering_alt add openlane configs for gpio_signal_buffering blocks (#305) 2022-10-19 12:30:30 -07:00
housekeeping update housekeeping views and openlane configuration 2022-10-18 04:07:27 -07:00
mgmt_protect add mgmt_protect views and openlane files 2022-10-16 03:14:55 -07:00
mprj2_logic_high [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
mprj_logic_high [DATA] Add views for the mgmt_protect 2021-11-15 13:21:52 +02:00
spare_logic_block [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00
user_analog_project_wrapper Move Rectify To Caravel 2022-01-15 23:27:38 +02:00
user_id_programming [DATA] Add gds/lef/maglef/gl views for the user_id_programming block 2021-11-15 18:17:32 +02:00
user_project_wrapper [DATA] Add digital user project wrapper 2021-11-17 13:13:11 +02:00
.gitignore [DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz 2021-11-15 15:50:43 +02:00
Makefile fix a typo in openlane run tag variable and flag 2022-10-12 06:35:17 -07:00
README.rst Apply automatic changes to Manifest and README.rst 2021-12-17 01:51:53 +00:00
README.src.rst add documentation 2021-12-16 17:51:16 -08:00
chip_dimensions.txt [DATA] Add initial caravel layout 2021-11-19 01:37:10 +02:00
openlane.md Update openlane.md 2022-01-14 11:27:37 -05:00

README.src.rst

.. raw:: html

   <!---
   # SPDX-FileCopyrightText: 2020 Efabless Corporation
   #
   # Licensed under the Apache License, Version 2.0 (the "License");
   # you may not use this file except in compliance with the License.
   # You may obtain a copy of the License at
   #
   #      http://www.apache.org/licenses/LICENSE-2.0
   #
   # Unless required by applicable law or agreed to in writing, software
   # distributed under the License is distributed on an "AS IS" BASIS,
   # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   # See the License for the specific language governing permissions and
   # limitations under the License.
   #
   # SPDX-License-Identifier: Apache-2.0
   -->


.. include:: ../docs/source/caravel-with-openlane.rst