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fabric_spice_options.cpp
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start transplanting FPGA-SPICE
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2020-07-05 12:10:12 -06:00 |
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fabric_spice_options.h
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start transplanting FPGA-SPICE
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2020-07-05 12:10:12 -06:00 |
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spice_api.cpp
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[FPGA-SPICE] Add auxiliary SPICE netlist writer
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2020-09-20 12:53:28 -06:00 |
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spice_api.h
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[FPGA-SPICE] add SPICE writer for logic blocks
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2020-09-20 12:38:24 -06:00 |
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spice_auxiliary_netlists.cpp
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[FPGA-SPICE] Add auxiliary SPICE netlist writer
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2020-09-20 12:53:28 -06:00 |
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spice_auxiliary_netlists.h
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[FPGA-SPICE] Add auxiliary SPICE netlist writer
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2020-09-20 12:53:28 -06:00 |
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spice_buffer.cpp
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[FPGA-SPICE] Add support for AND/OR logic gate
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2020-09-19 16:20:21 -06:00 |
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spice_buffer.h
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[FPGA-SPICE] Restructured SPICE netlist writers for atom circuits to avoid large cpp files
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2020-09-19 15:20:19 -06:00 |
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spice_constants.h
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[Tool] Now routing multiplexer in the same circuit model (regardless or input sizes) can share the same primitive module
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2020-12-05 10:53:01 -07:00 |
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spice_essential_gates.cpp
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[OPENFPGA LIBRARY] change method names to be consistent with FPGA-SPICE needs
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2020-09-20 12:03:10 -06:00 |
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spice_essential_gates.h
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[FPGA-SPICE] Add supply voltage generator
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2020-09-20 11:19:06 -06:00 |
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spice_grid.cpp
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[FPGA-SPICE] add SPICE writer for logic blocks
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2020-09-20 12:38:24 -06:00 |
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spice_grid.h
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[FPGA-SPICE] add SPICE writer for logic blocks
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2020-09-20 12:38:24 -06:00 |
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spice_logic_gate.cpp
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[FPGA-SPICE] Add support for AND/OR logic gate
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2020-09-19 16:20:21 -06:00 |
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spice_logic_gate.h
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[FPGA-SPICE] Add support for AND/OR logic gate
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2020-09-19 16:20:21 -06:00 |
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spice_lut.cpp
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[OPENFPGA LIBRARY] change method names to be consistent with FPGA-SPICE needs
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2020-09-20 12:03:10 -06:00 |
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spice_lut.h
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[FPGA-SPICE] Add SPICE writer for LUT
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2020-09-20 11:58:11 -06:00 |
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spice_memory.cpp
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[FPGA-SPICE] Add SPICE writer for memories
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2020-09-20 12:14:34 -06:00 |
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spice_memory.h
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[FPGA-SPICE] Add SPICE writer for memories
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2020-09-20 12:14:34 -06:00 |
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spice_mux.cpp
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[Tool] Bug fix for unifying mux primitive modules. Include memory size in the naming
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2020-12-05 12:44:09 -07:00 |
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spice_mux.h
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[FPGA-SPICE] Add SPICE writer for routing multiplexers
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2020-09-20 11:49:02 -06:00 |
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spice_passgate.cpp
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[FPGA-SPICE] Add support for AND/OR logic gate
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2020-09-19 16:20:21 -06:00 |
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spice_passgate.h
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[FPGA-SPICE] Add pass-gate SPICE netlist writer
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2020-09-19 14:59:00 -06:00 |
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spice_routing.cpp
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[FPGA-SPICE] Add SPICE writer for routing blocks
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2020-09-20 12:27:48 -06:00 |
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spice_routing.h
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[FPGA-SPICE] Add SPICE writer for routing blocks
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2020-09-20 12:27:48 -06:00 |
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spice_subckt_writer.cpp
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[FPGA-SPICE] Add VDD/VSS ports to SPICE subckt instanciation
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2020-09-20 15:21:33 -06:00 |
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spice_subckt_writer.h
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[FPGA-SPICE] Add SPICE subcircuit writer
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2020-09-19 23:01:44 -06:00 |
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spice_submodule.cpp
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[FPGA-Verilog] code format fix
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2020-09-20 12:18:22 -06:00 |
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spice_submodule.h
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[FPGA-SPICE] Add SPICE writer for routing multiplexers
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2020-09-20 11:49:02 -06:00 |
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spice_top_module.cpp
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[FPGA-SPICE] Add SPICE writer for fpga top module
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2020-09-20 12:43:48 -06:00 |
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spice_top_module.h
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[FPGA-SPICE] Add SPICE writer for fpga top module
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2020-09-20 12:43:48 -06:00 |
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spice_transistor_wrapper.cpp
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[FPGA-SPICE] Add support for AND/OR logic gate
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2020-09-19 16:20:21 -06:00 |
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spice_transistor_wrapper.h
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[FPGA-SPICE] Create generic PMOS/NMOS instanciation function
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2020-09-19 15:33:28 -06:00 |
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spice_wire.cpp
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[FPGA-SPICE] Add wire module SPICE writer
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2020-09-19 19:31:16 -06:00 |
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spice_wire.h
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[FPGA-SPICE] Add wire module SPICE writer
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2020-09-19 19:31:16 -06:00 |
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spice_writer_utils.cpp
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[FPGA-SPICE] Add VDD/VSS ports to SPICE subckt instanciation
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2020-09-20 15:21:33 -06:00 |
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spice_writer_utils.h
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[FPGA-SPICE] Add VDD and VSS port to module definition
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2020-09-20 14:58:15 -06:00 |
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