[FPGA-SPICE] Add VDD/VSS ports to SPICE subckt instanciation
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@ -2,6 +2,7 @@
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#define SPICE_CONSTANTS_H
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/* global parameters for dumping spice netlists */
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constexpr size_t SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE = 10;
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constexpr char* SPICE_NETLIST_FILE_POSTFIX = ".sp";
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@ -19,6 +19,9 @@
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#include "openfpga_naming.h"
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#include "module_manager_utils.h"
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#include "spice_constants.h"
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#include "spice_writer_utils.h"
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#include "spice_subckt_writer.h"
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@ -370,7 +373,7 @@ void write_spice_instance_to_file(std::fstream& fp,
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/* Currently we limit 10 ports per line to keep a clean netlist */
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new_line = false;
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if (10 == pin_cnt) {
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if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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@ -380,6 +383,29 @@ void write_spice_instance_to_file(std::fstream& fp,
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}
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}
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/* Print VDD and VSS ports
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* TODO: the supply ports should be derived from module manager
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*/
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if (true == new_line) {
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std::string port_whitespace(instance_head_line.length() - 2, ' ');
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fp << "+ " << port_whitespace;
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}
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write_space_to_file(fp, 1);
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fp << SPICE_SUBCKT_VDD_PORT_NAME;
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write_space_to_file(fp, 1);
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fp << SPICE_SUBCKT_GND_PORT_NAME;
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pin_cnt += 2;
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/* Check if we need a new line */
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new_line = false;
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if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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fit_one_line = false;
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}
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/* Print module name:
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* if port print cannot fit one line, we create a new line for the module for a clean format
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*/
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@ -148,7 +148,7 @@ void print_spice_subckt_definition(std::fstream& fp,
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/* Currently we limit 10 ports per line to keep a clean netlist */
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new_line = false;
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if (10 == pin_cnt) {
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if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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@ -159,13 +159,6 @@ void print_spice_subckt_definition(std::fstream& fp,
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/* Add supply ports if specified */
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if (true == include_supply_ports) {
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/* Check if we need a new line */
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new_line = false;
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if (10 == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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}
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/* Print VDD and VSS ports
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* TODO: the supply ports should be derived from module manager
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*/
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@ -325,7 +318,7 @@ void print_spice_subckt_instance(std::fstream& fp,
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/* Currently we limit 10 ports per line to keep a clean netlist */
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new_line = false;
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if (10 == pin_cnt) {
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if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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@ -335,6 +328,29 @@ void print_spice_subckt_instance(std::fstream& fp,
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}
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}
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/* Print VDD and VSS ports
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* TODO: the supply ports should be derived from module manager
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*/
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if (true == new_line) {
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std::string port_whitespace(instance_head_line.length() - 2, ' ');
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fp << "+ " << port_whitespace;
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}
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write_space_to_file(fp, 1);
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fp << SPICE_SUBCKT_VDD_PORT_NAME;
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write_space_to_file(fp, 1);
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fp << SPICE_SUBCKT_GND_PORT_NAME;
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pin_cnt += 2;
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/* Check if we need a new line */
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new_line = false;
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if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) {
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pin_cnt = 0;
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fp << std::endl;
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new_line = true;
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fit_one_line = false;
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}
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/* Print module name:
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* if port print cannot fit one line, we create a new line for the module for a clean format
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*/
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