From c6ac02d210466fb0d31aa77520e7e0a7c39733b8 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Sun, 20 Sep 2020 15:21:33 -0600 Subject: [PATCH] [FPGA-SPICE] Add VDD/VSS ports to SPICE subckt instanciation --- openfpga/src/fpga_spice/spice_constants.h | 1 + .../src/fpga_spice/spice_subckt_writer.cpp | 28 ++++++++++++++- .../src/fpga_spice/spice_writer_utils.cpp | 34 ++++++++++++++----- 3 files changed, 53 insertions(+), 10 deletions(-) diff --git a/openfpga/src/fpga_spice/spice_constants.h b/openfpga/src/fpga_spice/spice_constants.h index 68026a0be..3e045b40c 100644 --- a/openfpga/src/fpga_spice/spice_constants.h +++ b/openfpga/src/fpga_spice/spice_constants.h @@ -2,6 +2,7 @@ #define SPICE_CONSTANTS_H /* global parameters for dumping spice netlists */ +constexpr size_t SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE = 10; constexpr char* SPICE_NETLIST_FILE_POSTFIX = ".sp"; diff --git a/openfpga/src/fpga_spice/spice_subckt_writer.cpp b/openfpga/src/fpga_spice/spice_subckt_writer.cpp index c90c0b5ac..291404ec6 100644 --- a/openfpga/src/fpga_spice/spice_subckt_writer.cpp +++ b/openfpga/src/fpga_spice/spice_subckt_writer.cpp @@ -19,6 +19,9 @@ #include "openfpga_naming.h" #include "module_manager_utils.h" + + +#include "spice_constants.h" #include "spice_writer_utils.h" #include "spice_subckt_writer.h" @@ -370,7 +373,7 @@ void write_spice_instance_to_file(std::fstream& fp, /* Currently we limit 10 ports per line to keep a clean netlist */ new_line = false; - if (10 == pin_cnt) { + if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) { pin_cnt = 0; fp << std::endl; new_line = true; @@ -380,6 +383,29 @@ void write_spice_instance_to_file(std::fstream& fp, } } + /* Print VDD and VSS ports + * TODO: the supply ports should be derived from module manager + */ + if (true == new_line) { + std::string port_whitespace(instance_head_line.length() - 2, ' '); + fp << "+ " << port_whitespace; + } + write_space_to_file(fp, 1); + fp << SPICE_SUBCKT_VDD_PORT_NAME; + write_space_to_file(fp, 1); + fp << SPICE_SUBCKT_GND_PORT_NAME; + + pin_cnt += 2; + + /* Check if we need a new line */ + new_line = false; + if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) { + pin_cnt = 0; + fp << std::endl; + new_line = true; + fit_one_line = false; + } + /* Print module name: * if port print cannot fit one line, we create a new line for the module for a clean format */ diff --git a/openfpga/src/fpga_spice/spice_writer_utils.cpp b/openfpga/src/fpga_spice/spice_writer_utils.cpp index 75f22196c..68d3360b1 100644 --- a/openfpga/src/fpga_spice/spice_writer_utils.cpp +++ b/openfpga/src/fpga_spice/spice_writer_utils.cpp @@ -148,7 +148,7 @@ void print_spice_subckt_definition(std::fstream& fp, /* Currently we limit 10 ports per line to keep a clean netlist */ new_line = false; - if (10 == pin_cnt) { + if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) { pin_cnt = 0; fp << std::endl; new_line = true; @@ -159,13 +159,6 @@ void print_spice_subckt_definition(std::fstream& fp, /* Add supply ports if specified */ if (true == include_supply_ports) { - /* Check if we need a new line */ - new_line = false; - if (10 == pin_cnt) { - pin_cnt = 0; - fp << std::endl; - new_line = true; - } /* Print VDD and VSS ports * TODO: the supply ports should be derived from module manager */ @@ -325,7 +318,7 @@ void print_spice_subckt_instance(std::fstream& fp, /* Currently we limit 10 ports per line to keep a clean netlist */ new_line = false; - if (10 == pin_cnt) { + if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) { pin_cnt = 0; fp << std::endl; new_line = true; @@ -335,6 +328,29 @@ void print_spice_subckt_instance(std::fstream& fp, } } + /* Print VDD and VSS ports + * TODO: the supply ports should be derived from module manager + */ + if (true == new_line) { + std::string port_whitespace(instance_head_line.length() - 2, ' '); + fp << "+ " << port_whitespace; + } + write_space_to_file(fp, 1); + fp << SPICE_SUBCKT_VDD_PORT_NAME; + write_space_to_file(fp, 1); + fp << SPICE_SUBCKT_GND_PORT_NAME; + + pin_cnt += 2; + + /* Check if we need a new line */ + new_line = false; + if (SPICE_NETLIST_MAX_NUM_PORTS_PER_LINE == pin_cnt) { + pin_cnt = 0; + fp << std::endl; + new_line = true; + fit_one_line = false; + } + /* Print module name: * if port print cannot fit one line, we create a new line for the module for a clean format */