Commit Graph

2195 Commits

Author SHA1 Message Date
tangxifan de4586217f now device binding is not mandatory for circuit models 2020-07-14 12:04:22 -06:00
tangxifan e2b492f184 add circuit model tech binding 2020-07-13 20:35:10 -06:00
tangxifan 1c5bede282 update arch file with device technology binding information 2020-07-13 19:06:51 -06:00
tangxifan 1b55dfb441 hotfix on treating the dangling ports in pb_graph for analysis SDC generator 2020-07-09 23:28:42 -06:00
tangxifan 62fd0947f5 using a unified string to replace multi net names to save memory of bitstream database 2020-07-08 16:28:20 -06:00
tangxifan 65dfc545c1 update documentation for fabric key 2020-07-07 10:28:29 -06:00
tangxifan 66e5e141a1 improve fabric key loader to reduce runtime 2020-07-07 10:19:34 -06:00
tangxifan 7615db2be6 update documentation for the new fabric key rules 2020-07-06 16:44:21 -06:00
tangxifan 824b56f14c fabric key can now accept instance name only; decoders are no longer part of the key 2020-07-06 16:42:33 -06:00
tangxifan 462fc0d04e add spice transistor wrapper writer 2020-07-05 14:50:29 -06:00
tangxifan b38ee0e8be add spice writer functions 2020-07-05 13:58:05 -06:00
tangxifan 81171a8f97 start transplanting FPGA-SPICE 2020-07-05 12:10:12 -06:00
tangxifan 1ad6e8292a move constants from verilog domain to common so that FPGA-SPICE can share 2020-07-05 11:39:46 -06:00
tangxifan 7c2a0a6ad2 streamline fabric verilog options 2020-07-05 11:28:14 -06:00
tangxifan 83e26adf90 add module usage types for future FPGA-SPICE development 2020-07-04 22:33:54 -06:00
tangxifan ece262f544 remove debug mode in compilation guidelines as we can use release in default now 2020-07-04 19:19:06 -06:00
tangxifan 1e6955aaa4 rename arch directory to be clear for its usage 2020-07-04 19:13:28 -06:00
tangxifan f9a2bb0490 Reorganize task directory 2020-07-04 19:06:41 -06:00
tangxifan 7f5710276f now use release mode in CI compilation 2020-07-04 17:32:31 -06:00
tangxifan 4f8260a7ba remove obselete codes and update regression tests 2020-07-04 17:31:34 -06:00
tangxifan 033c92c365 precisely reserve memory for child blocks in bitstream manager 2020-07-03 22:47:21 -06:00
tangxifan 46f038c829 bug fix in grid config block allocation 2020-07-03 20:46:04 -06:00
tangxifan f040fc78a9 now reserve blocks in bitstream manager can accurately capture the size 2020-07-03 20:06:12 -06:00
tangxifan 8067a13346 bug fix for memory bank due to encoding bl/wl addresses in fabric bitstream 2020-07-03 15:56:20 -06:00
tangxifan 2a9377b3f4 use encoded address in storage of fabric bitstream to save memory 2020-07-03 15:12:29 -06:00
tangxifan 1f38e17111 bug fix for naming conflicts in mux local encoder and architecture decoders 2020-07-03 14:12:13 -06:00
tangxifan 70d9678578 reserve child block in bistream manager 2020-07-03 14:04:10 -06:00
tangxifan 7d9c36aae1 use length instead of msb in bitstream manager for block bits to save memory 2020-07-03 12:06:15 -06:00
tangxifan 2783fda344 use index range instead of vector for block bitstream 2020-07-03 11:42:38 -06:00
tangxifan 6ea857ae6c use fast method to inquire number of bits and blocks in bitstream databases 2020-07-03 10:55:25 -06:00
tangxifan 6397cbe9d2 remove unused data in bitstream manager to compact memory usage 2020-07-03 10:35:35 -06:00
tangxifan 7ca1a5bdc1 Fabric bitstream now allocates vectors in conditions for memory efficiency 2020-07-03 10:17:03 -06:00
tangxifan 8a45e48a1c minor fix 2020-07-02 22:27:48 -06:00
tangxifan 246b4d5ac6 reserve block bits to save memory 2020-07-02 21:52:32 -06:00
tangxifan 043fb54206 remove unused data in bitstream database 2020-07-02 20:53:18 -06:00
tangxifan 9799fea48f optimizing bitstream storage 2020-07-02 19:33:53 -06:00
tangxifan dee4be96af reserve all the input/output net storage in bitstream manager 2020-07-02 19:17:34 -06:00
tangxifan f97e3bfba6 add timer to openfpga shell 2020-07-02 18:02:33 -06:00
tangxifan 1c634e4600 add missing task file for generate bitstream test case 2020-07-02 17:24:51 -06:00
tangxifan 81c9fcb7c0 bug fix when optimizing the fabric bitstream data structure 2020-07-02 16:41:32 -06:00
tangxifan adea6fcec4 add bitstream generation only test case to CI 2020-07-02 16:31:22 -06:00
tangxifan adee87569d enable fast bitstream building by creating a frame view of fabric 2020-07-02 16:25:36 -06:00
tangxifan e82d0d9f34 drop id list in bitstream manager to save memory usage 2020-07-02 16:18:32 -06:00
tangxifan 9608cefa86 remove id vector in fabric bitstream database and replace with more memory efficient implementation 2020-07-02 16:08:50 -06:00
tangxifan 9f19c36a89 use char in fabric bitstream to save memory footprint 2020-07-02 15:56:50 -06:00
tangxifan 405824081b reserve configuration blocks and bits in bitstream manager builder to be memory efficient 2020-07-02 15:28:52 -06:00
tangxifan b85af57971 optimizing fabric bitsteream memory footprint 2020-07-02 12:39:18 -06:00
tangxifan ac22ba28e4 add config protocol type information to simulation ini file 2020-07-02 12:26:59 -06:00
tangxifan 81ecfa3197 add comments to clarify how to select CB ports when connecting to SBs at the top level 2020-07-01 14:44:40 -06:00
tangxifan 0a3c746fb1 now split CB module bus ports into lower/upper parts 2020-07-01 14:37:13 -06:00