enable fast bitstream building by creating a frame view of fabric
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@ -67,6 +67,7 @@ void compress_routing_hierarchy(OpenfpgaContext& openfpga_ctx,
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int build_fabric(OpenfpgaContext& openfpga_ctx,
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const Command& cmd, const CommandContext& cmd_context) {
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CommandOptionId opt_frame_view = cmd.option("frame_view");
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CommandOptionId opt_compress_routing = cmd.option("compress_routing");
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CommandOptionId opt_duplicate_grid_pin = cmd.option("duplicate_grid_pin");
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CommandOptionId opt_gen_random_fabric_key = cmd.option("generate_random_fabric_key");
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@ -96,6 +97,7 @@ int build_fabric(OpenfpgaContext& openfpga_ctx,
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openfpga_ctx.mutable_decoder_lib(),
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const_cast<const OpenfpgaContext&>(openfpga_ctx),
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g_vpr_ctx.device(),
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cmd_context.option_enable(cmd, opt_frame_view),
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cmd_context.option_enable(cmd, opt_compress_routing),
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cmd_context.option_enable(cmd, opt_duplicate_grid_pin),
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predefined_fabric_key,
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@ -267,6 +267,9 @@ ShellCommandId add_openfpga_build_fabric_command(openfpga::Shell<OpenfpgaContext
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Command shell_cmd("build_fabric");
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/* Add an option '--frame_view' */
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shell_cmd.add_option("frame_view", false, "Build only frame view of the fabric (nets are skipped)");
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/* Add an option '--compress_routing' */
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shell_cmd.add_option("compress_routing", false, "Compress the number of unique routing modules by identifying the unique GSBs");
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@ -30,6 +30,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map,
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DecoderLibrary& decoder_lib,
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const OpenfpgaContext& openfpga_ctx,
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const DeviceContext& vpr_device_ctx,
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const bool& frame_view,
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const bool& compress_routing,
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const bool& duplicate_grid_pin,
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const FabricKey& fabric_key,
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@ -118,7 +119,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map,
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openfpga_ctx.arch().arch_direct,
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openfpga_ctx.arch().config_protocol.type(),
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sram_model,
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compress_routing, duplicate_grid_pin,
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frame_view, compress_routing, duplicate_grid_pin,
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fabric_key, generate_random_fabric_key);
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/* Now a critical correction has to be done!
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@ -19,6 +19,7 @@ ModuleManager build_device_module_graph(IoLocationMap& io_location_map,
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DecoderLibrary& decoder_lib,
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const OpenfpgaContext& openfpga_ctx,
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const DeviceContext& vpr_device_ctx,
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const bool& frame_view,
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const bool& compress_routing,
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const bool& duplicate_grid_pin,
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const FabricKey& fabric_key,
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@ -329,6 +329,7 @@ void build_top_module(ModuleManager& module_manager,
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const ArchDirect& arch_direct,
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const e_config_protocol_type& sram_orgz_type,
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const CircuitModelId& sram_model,
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const bool& frame_view,
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const bool& compact_routing_hierarchy,
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const bool& duplicate_grid_pin,
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const FabricKey& fabric_key,
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@ -351,18 +352,23 @@ void build_top_module(ModuleManager& module_manager,
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cb_instance_ids[CHANX] = add_top_module_connection_block_instances(module_manager, top_module, device_rr_gsb, CHANX, compact_routing_hierarchy);
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cb_instance_ids[CHANY] = add_top_module_connection_block_instances(module_manager, top_module, device_rr_gsb, CHANY, compact_routing_hierarchy);
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/* Reserve nets to be memory efficient */
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reserve_module_manager_module_nets(module_manager, top_module);
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/* Add nets when we need a complete fabric modeling,
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* which is required by downstream functions
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*/
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if (false == frame_view) {
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/* Reserve nets to be memory efficient */
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reserve_module_manager_module_nets(module_manager, top_module);
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/* Add module nets to connect the sub modules */
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add_top_module_nets_connect_grids_and_gsbs(module_manager, top_module,
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grids, grid_instance_ids,
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rr_graph, device_rr_gsb, sb_instance_ids, cb_instance_ids,
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compact_routing_hierarchy, duplicate_grid_pin);
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/* Add inter-CLB direct connections */
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add_top_module_nets_tile_direct_connections(module_manager, top_module, circuit_lib,
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grids, grid_instance_ids,
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tile_direct, arch_direct);
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/* Add module nets to connect the sub modules */
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add_top_module_nets_connect_grids_and_gsbs(module_manager, top_module,
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grids, grid_instance_ids,
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rr_graph, device_rr_gsb, sb_instance_ids, cb_instance_ids,
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compact_routing_hierarchy, duplicate_grid_pin);
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/* Add inter-CLB direct connections */
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add_top_module_nets_tile_direct_connections(module_manager, top_module, circuit_lib,
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grids, grid_instance_ids,
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tile_direct, arch_direct);
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}
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/* Add global ports to the pb_module:
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* This is a much easier job after adding sub modules (instances),
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@ -36,6 +36,7 @@ void build_top_module(ModuleManager& module_manager,
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const ArchDirect& arch_direct,
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const e_config_protocol_type& sram_orgz_type,
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const CircuitModelId& sram_model,
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const bool& frame_view,
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const bool& compact_routing_hierarchy,
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const bool& duplicate_grid_pin,
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const FabricKey& fabric_key,
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