tangxifan
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fc6bfdc7a2
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[OpenFPGA Code] Patch syntax compatibility for older gcc
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2020-09-14 18:55:21 -06:00 |
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tangxifan
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04070fd4ca
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[Debug aid] add pb_type full hierarchy path in the error message of architecture binding checker
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2020-09-02 22:16:10 -06:00 |
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tangxifan
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3eea12ceae
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added a new XML syntax: initial offset for physical mode pin mapping
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2020-08-19 14:43:44 -06:00 |
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tangxifan
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f631245b2b
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bug fix and enriched debugging info print out
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2020-08-19 13:41:04 -06:00 |
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tangxifan
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79b6ff3cb0
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relax checking for device annotation as we support multi-port during physical mode pin mapping
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2020-08-19 12:44:51 -06:00 |
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tangxifan
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2712c354a9
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now physical pb_port binding support multiple ports
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2020-08-18 12:38:56 -06:00 |
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tangxifan
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5d83abb2cf
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bug fix in read architecture bitstream and regression tests
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2020-07-27 19:37:05 -06:00 |
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tangxifan
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9a7364c6e6
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bug fix in fabric bitstream XML syntax
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2020-07-27 19:22:36 -06:00 |
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tangxifan
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35af0dd676
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streamline fabric bitstream file format
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2020-07-27 16:34:43 -06:00 |
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tangxifan
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8dd26094b8
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add root node to fabric bitstream XML file format
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2020-07-27 15:31:08 -06:00 |
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tangxifan
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6592db3dfe
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bug fix in calling the wrong function of write_fabric_bitstream
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2020-07-27 14:32:58 -06:00 |
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tangxifan
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d68e77f322
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Split the writer of build_fabric_bitstream to a separated command so that users will output multiple files in different formats
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2020-07-27 14:16:33 -06:00 |
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tangxifan
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e09eddab43
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add width syntex to the fabric bitstream file format
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2020-07-27 13:54:23 -06:00 |
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tangxifan
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80e982fb39
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minor file format fix in fabric bitstream XML
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2020-07-26 21:35:48 -06:00 |
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tangxifan
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b3ad04fd1e
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minor file format fix in fabric bitstream XML
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2020-07-26 21:33:47 -06:00 |
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tangxifan
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861e346830
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minor bug fix in fabric bitstream XML writer
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2020-07-26 21:31:08 -06:00 |
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tangxifan
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5fb7d9fbdb
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bug fix in fabric bitstream file format writer
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2020-07-26 21:28:45 -06:00 |
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tangxifan
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92d2d2d849
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add fabric bitstream XML writer
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2020-07-26 21:00:57 -06:00 |
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tangxifan
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a3d22c56e3
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bug fix in FPGA-SPICE
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2020-07-24 19:51:32 -06:00 |
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tangxifan
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fd3e947c6d
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update FPGA_SPICE to support max width for transistors and multi-bin
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2020-07-24 17:52:31 -06:00 |
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tangxifan
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73e2b857a3
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add buffer support to FPGA-SPICE
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2020-07-24 15:54:18 -06:00 |
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tangxifan
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2603836111
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split logical tile netlists to keep good Verilog hierarchy
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2020-07-24 12:53:21 -06:00 |
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tangxifan
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be5966475e
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formulate file name, module name and instance name to be consistent
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2020-07-24 12:23:27 -06:00 |
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tangxifan
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22159531c5
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bug fix in power gating support of FPGA-Verilog
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2020-07-22 20:21:38 -06:00 |
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tangxifan
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a4a38f8156
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support multi-bit power gate ports in FPGA-SPICE
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2020-07-22 20:04:39 -06:00 |
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tangxifan
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f573fa3ee0
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move check codes on power gate ports to libarchopenfpga
Try to report errors to users as early as possible
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2020-07-22 18:47:12 -06:00 |
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tangxifan
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97cca72590
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add spice support on power gated inverters
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2020-07-22 18:21:11 -06:00 |
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tangxifan
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b5fd6aa859
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add inverter subckt writer to FPGA-SPICE
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2020-07-17 13:01:08 -06:00 |
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tangxifan
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eb070694b5
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fine-tune on fast configuration for configuration chain and test case for tape-out-ish architecture
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2020-07-15 17:52:41 -06:00 |
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tangxifan
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66a50742fc
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use configuration chain in the k4k4 test case to speed up CI
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2020-07-15 11:56:11 -06:00 |
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tangxifan
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3f14fe62c7
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add fast configuration support for configuration chain protocol
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2020-07-15 11:44:23 -06:00 |
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tangxifan
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1b55dfb441
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hotfix on treating the dangling ports in pb_graph for analysis SDC generator
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2020-07-09 23:28:42 -06:00 |
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tangxifan
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62fd0947f5
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using a unified string to replace multi net names to save memory of bitstream database
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2020-07-08 16:28:20 -06:00 |
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tangxifan
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66e5e141a1
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improve fabric key loader to reduce runtime
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2020-07-07 10:19:34 -06:00 |
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tangxifan
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824b56f14c
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fabric key can now accept instance name only; decoders are no longer part of the key
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2020-07-06 16:42:33 -06:00 |
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tangxifan
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462fc0d04e
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add spice transistor wrapper writer
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2020-07-05 14:50:29 -06:00 |
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tangxifan
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b38ee0e8be
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add spice writer functions
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2020-07-05 13:58:05 -06:00 |
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tangxifan
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81171a8f97
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start transplanting FPGA-SPICE
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2020-07-05 12:10:12 -06:00 |
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tangxifan
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1ad6e8292a
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move constants from verilog domain to common so that FPGA-SPICE can share
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2020-07-05 11:39:46 -06:00 |
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tangxifan
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7c2a0a6ad2
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streamline fabric verilog options
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2020-07-05 11:28:14 -06:00 |
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tangxifan
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83e26adf90
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add module usage types for future FPGA-SPICE development
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2020-07-04 22:33:54 -06:00 |
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tangxifan
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4f8260a7ba
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remove obselete codes and update regression tests
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2020-07-04 17:31:34 -06:00 |
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tangxifan
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033c92c365
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precisely reserve memory for child blocks in bitstream manager
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2020-07-03 22:47:21 -06:00 |
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tangxifan
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46f038c829
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bug fix in grid config block allocation
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2020-07-03 20:46:04 -06:00 |
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tangxifan
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f040fc78a9
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now reserve blocks in bitstream manager can accurately capture the size
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2020-07-03 20:06:12 -06:00 |
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tangxifan
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8067a13346
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bug fix for memory bank due to encoding bl/wl addresses in fabric bitstream
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2020-07-03 15:56:20 -06:00 |
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tangxifan
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2a9377b3f4
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use encoded address in storage of fabric bitstream to save memory
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2020-07-03 15:12:29 -06:00 |
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tangxifan
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1f38e17111
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bug fix for naming conflicts in mux local encoder and architecture decoders
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2020-07-03 14:12:13 -06:00 |
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tangxifan
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70d9678578
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reserve child block in bistream manager
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2020-07-03 14:04:10 -06:00 |
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tangxifan
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2783fda344
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use index range instead of vector for block bitstream
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2020-07-03 11:42:38 -06:00 |