[Debug aid] add pb_type full hierarchy path in the error message of architecture binding checker
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@ -194,7 +194,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
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/* Every physical pb_type should be linked to a valid circuit model */
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if (CircuitModelId::INVALID() == vpr_device_annotation.pb_type_circuit_model(cur_pb_type)) {
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VTR_LOG_ERROR("Found a physical pb_type '%s' missing circuit model binding!\n",
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cur_pb_type->name);
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generate_pb_type_hierarchy_path(cur_pb_type).c_str());
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num_err++;
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return; /* Invalid id already, further check is not applicable */
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}
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@ -202,7 +202,8 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
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for (t_port* port : pb_type_ports(cur_pb_type)) {
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if (CircuitPortId::INVALID() == vpr_device_annotation.pb_circuit_port(port)) {
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VTR_LOG_ERROR("Found a port '%s' of physical pb_type '%s' missing circuit port binding!\n",
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port->name, cur_pb_type->name);
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port->name,
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generate_pb_type_hierarchy_path(cur_pb_type).c_str());
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num_err++;
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}
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}
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@ -217,7 +218,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
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VTR_LOG_ERROR("Found an interconnect '%s' under physical mode '%s' of pb_type '%s' missing circuit model binding!\n",
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interc->name,
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physical_mode->name,
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cur_pb_type->name);
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generate_pb_type_hierarchy_path(cur_pb_type).c_str());
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num_err++;
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continue;
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}
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@ -226,7 +227,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
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VTR_LOG_ERROR("Found an interconnect '%s' under physical mode '%s' of pb_type '%s' linked to a circuit model '%s' with a wrong type!\nExpect: '%s' Linked: '%s'\n",
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interc->name,
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physical_mode->name,
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cur_pb_type->name,
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generate_pb_type_hierarchy_path(cur_pb_type).c_str(),
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circuit_lib.model_name(interc_circuit_model).c_str(),
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CIRCUIT_MODEL_TYPE_STRING[circuit_lib.model_type(interc_circuit_model)],
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CIRCUIT_MODEL_TYPE_STRING[required_circuit_model_type]);
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@ -324,4 +324,42 @@ std::vector<t_port*> find_pb_type_ports_match_circuit_model_port_type(t_pb_type*
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return ports;
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}
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/*********************************************************************
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* Generate the full hierarchy for a pb_type
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* The final name will be in the following format:
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* <top_pb_type_name>[<mode_name>].<parent_pb_type_name> ... <current_pb_type_name>
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*
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* TODO: This function should be part of the VPR libarchfpga parser
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**********************************************************************/
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std::string generate_pb_type_hierarchy_path(t_pb_type* cur_pb_type) {
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std::string hie_name(cur_pb_type->name);
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t_pb_type* parent_pb_type = cur_pb_type;
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/* Backward trace until we meet the top-level pb_type */
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while (1) {
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/* If there is no parent mode, this is a top-level pb_type, quit the loop here */
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t_mode* parent_mode = parent_pb_type->parent_mode;
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if (NULL == parent_mode) {
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break;
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}
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/* Add the mode name to the full hierarchy */
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hie_name = std::string("[") + std::string(parent_mode->name) + std::string("].") + hie_name;
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/* Backtrace to the upper level */
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parent_pb_type = parent_mode->parent_pb_type;
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/* If there is no parent pb_type, this is a top-level pb_type, quit the loop here */
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if (NULL == parent_pb_type) {
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break;
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}
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/* Add the current pb_type name to the hierarchy name */
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hie_name = std::string(parent_pb_type->name) + hie_name;
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}
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return hie_name;
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}
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} /* end namespace openfpga */
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@ -57,6 +57,8 @@ std::vector<t_port*> find_pb_type_ports_match_circuit_model_port_type(t_pb_type*
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const e_circuit_model_port_type& port_type,
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const VprDeviceAnnotation& vpr_device_annotation);
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std::string generate_pb_type_hierarchy_path(t_pb_type* cur_pb_type);
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} /* end namespace openfpga */
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#endif
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