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[Debug aid] add pb_type full hierarchy path in the error message of architecture binding checker

This commit is contained in:
tangxifan 2020-09-02 22:16:10 -06:00
parent b5251ce5af
commit 04070fd4ca
3 changed files with 45 additions and 4 deletions
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9
openfpga/src/annotation/check_pb_type_annotation.cpp
View File

@ -194,7 +194,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
/* Every physical pb_type should be linked to a valid circuit model */
if (CircuitModelId::INVALID() == vpr_device_annotation.pb_type_circuit_model(cur_pb_type)) {
VTR_LOG_ERROR("Found a physical pb_type '%s' missing circuit model binding!\n",
cur_pb_type->name);
generate_pb_type_hierarchy_path(cur_pb_type).c_str());
num_err++;
return; /* Invalid id already, further check is not applicable */
}
@ -202,7 +202,8 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
for (t_port* port : pb_type_ports(cur_pb_type)) {
if (CircuitPortId::INVALID() == vpr_device_annotation.pb_circuit_port(port)) {
VTR_LOG_ERROR("Found a port '%s' of physical pb_type '%s' missing circuit port binding!\n",
port->name, cur_pb_type->name);
port->name,
generate_pb_type_hierarchy_path(cur_pb_type).c_str());
num_err++;
}
}
@ -217,7 +218,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
VTR_LOG_ERROR("Found an interconnect '%s' under physical mode '%s' of pb_type '%s' missing circuit model binding!\n",
interc->name,
physical_mode->name,
cur_pb_type->name);
generate_pb_type_hierarchy_path(cur_pb_type).c_str());
num_err++;
continue;
}
@ -226,7 +227,7 @@ void rec_check_vpr_pb_type_circuit_model_annotation(t_pb_type* cur_pb_type,
VTR_LOG_ERROR("Found an interconnect '%s' under physical mode '%s' of pb_type '%s' linked to a circuit model '%s' with a wrong type!\nExpect: '%s' Linked: '%s'\n",
interc->name,
physical_mode->name,
cur_pb_type->name,
generate_pb_type_hierarchy_path(cur_pb_type).c_str(),
circuit_lib.model_name(interc_circuit_model).c_str(),
CIRCUIT_MODEL_TYPE_STRING[circuit_lib.model_type(interc_circuit_model)],
CIRCUIT_MODEL_TYPE_STRING[required_circuit_model_type]);

38
openfpga/src/utils/pb_type_utils.cpp
View File

@ -324,4 +324,42 @@ std::vector<t_port*> find_pb_type_ports_match_circuit_model_port_type(t_pb_type*
return ports;
}
/*********************************************************************
* Generate the full hierarchy for a pb_type
* The final name will be in the following format:
* <top_pb_type_name>[<mode_name>].<parent_pb_type_name> ... <current_pb_type_name>
*
* TODO: This function should be part of the VPR libarchfpga parser
**********************************************************************/
std::string generate_pb_type_hierarchy_path(t_pb_type* cur_pb_type) {
std::string hie_name(cur_pb_type->name);
t_pb_type* parent_pb_type = cur_pb_type;
/* Backward trace until we meet the top-level pb_type */
while (1) {
/* If there is no parent mode, this is a top-level pb_type, quit the loop here */
t_mode* parent_mode = parent_pb_type->parent_mode;
if (NULL == parent_mode) {
break;
}
/* Add the mode name to the full hierarchy */
hie_name = std::string("[") + std::string(parent_mode->name) + std::string("].") + hie_name;
/* Backtrace to the upper level */
parent_pb_type = parent_mode->parent_pb_type;
/* If there is no parent pb_type, this is a top-level pb_type, quit the loop here */
if (NULL == parent_pb_type) {
break;
}
/* Add the current pb_type name to the hierarchy name */
hie_name = std::string(parent_pb_type->name) + hie_name;
}
return hie_name;
}
} /* end namespace openfpga */

2
openfpga/src/utils/pb_type_utils.h
View File

@ -57,6 +57,8 @@ std::vector<t_port*> find_pb_type_ports_match_circuit_model_port_type(t_pb_type*
const e_circuit_model_port_type& port_type,
const VprDeviceAnnotation& vpr_device_annotation);
std::string generate_pb_type_hierarchy_path(t_pb_type* cur_pb_type);
} /* end namespace openfpga */
#endif