9020577e80
Support SVG in Sphinx Latex building ( #220 )
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* [Doc] Try use image converter instead of svg2pdf which requires more dependencies
* [Doc] Add img converter to conf.py
* [Doc] Bug fix in importing imgconverter package
* [Doc] Try to fix the bug when importing python packages
* [Doc] bug fix
* [Doc] Try to use imgconverter rather than cairo
* [Doc] Add svg to latex config in sphinx configuration file
* [Doc] Try cairo svg converter
* [Doc] Correct bugs in compiling latexpdf
* [Doc] Use latest image in building readthedocs
* [Doc] Now use readthedocs docker image in building online documentation
* [Doc] Correct typo in readthedocs setting
* [Doc] Try to use inkscape converter as imgconverter converted SVG to black images
* [Doc] Try RSVG
2021-02-07 18:53:16 -07:00
9f7d03cd05
Merge pull request #219 from lnis-uofu/dev
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Documentation Patches on Supporting PDF builds
2021-02-07 11:15:19 -07:00
05fea49b87
[Doc] Skip youtube video when building pdf; Apply SVG2PDF converter so that svg images can be included in the pdf
2021-02-07 10:35:20 -07:00
6cb44db9f4
Merge pull request #218 from lnis-uofu/dev
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Add tutorial videos to Documentation
2021-02-06 23:07:39 -07:00
f6ec558bc2
[Doc] Now embed video in the documentation
2021-02-06 19:45:41 -07:00
a4b9199737
[Doc] Add tutorial about fabric netlist generation
2021-02-06 17:46:56 -07:00
1ff597ea66
[Doc] Add tutorial video links to documentation
2021-02-06 17:16:15 -07:00
288830ec7a
[Doc] Add tutorial video link to front-page
2021-02-06 17:15:53 -07:00
00fc3d7622
Merge pull request #217 from lnis-uofu/dev
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Synchronize the out-of-date XML syntax 'disable_in_pack' with VPR upstream
2021-02-05 09:53:28 -07:00
c4fe9a67f7
Merge pull request #215 from lnis-uofu/compilation_fixes
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Changed readthedocs.io dependencies link
2021-02-05 09:42:15 -07:00
ee14c15e58
Merge pull request #212 from lnis-uofu/soft_adder_lut_support
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Support overloading LUT bitstream from attributes in .eblif file format
2021-02-04 21:55:02 -07:00
8853370c60
[Script, Benchmark, Test] Now use circuit format in openfpga shell script to specify eblif file
2021-02-04 20:20:10 -07:00
dc09c47411
[Arch] Remove packable from architecture files and replace with disable_packing
2021-02-04 18:03:56 -07:00
3513966078
[Tool] Borrow a quick fix from the VPR pull request https://github.com/verilog-to-routing/vtr-verilog-to-routing/pull/1656/files
2021-02-04 17:30:49 -07:00
224bf6c686
Merge branch 'master' into dev
2021-02-04 17:21:15 -07:00
1d96974b99
[Tool] Patch to remove compiler warnings
2021-02-04 16:54:04 -07:00
9b5c64f35f
[Doc] Update documentation about disable_packing syntax
2021-02-04 16:41:24 -07:00
66bc370c4d
[Arch] Use disable_packing in architecture library
2021-02-04 16:29:03 -07:00
2483154c34
[Tool] Patch disable_packing XML syntax to be consistent with VPR upstream
2021-02-04 16:28:32 -07:00
a224f6c54b
added README compilation link fix
2021-02-04 11:24:19 -08:00
fe806f8ac3
changed docs dependencies link
2021-02-04 10:58:59 -08:00
a4c266d59a
[Arch] Add pack patterns for soft adders; Still fail in packing
2021-02-03 19:11:15 -07:00
fb10a96ee5
Merge pull request #214 from lnis-uofu/gg_cleanup
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[Cleanup] Removed deadcode
2021-02-03 12:44:00 -07:00
cac1160bf7
[Arch] Patch QLSOFA architecture to support carry chain pattern; Still buggy for VPR packer; Looking for a solution
2021-02-03 11:20:56 -07:00
df4a397470
[Cleanup] Removed deadcode
2021-02-03 10:35:14 -07:00
4c825b27b3
[Benchmark] Change to use adder lut4 to be consistent with architecture
2021-02-03 09:37:48 -07:00
31441c0b64
[Test] Deploy adder_8 to soft adder test
2021-02-03 09:26:38 -07:00
05d63567d0
[Benchmark] Use latest adder eblif file
2021-02-03 09:21:38 -07:00
f124c79e6b
Merge pull request #213 from lnis-uofu/bump_yosys_adder
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Bumping up latest yosys changes related to adder tech mapping
2021-02-03 09:15:43 -07:00
ebe66dea35
Bumping up latest yosys changes related to adder tech mapping
2021-02-03 14:30:06 +05:30
2c06960e4f
[Benchmark] Add subckt definition to micro benchmark and2.eblif
2021-02-02 15:51:16 -07:00
021520783b
[Arch] Add dummy timing info to adder_lut4 and carry_follower model
2021-02-02 15:49:43 -07:00
dc320182b0
[Benchmark] Bug fix in the and2 eblif to cooperate with the architecture models
2021-02-02 15:04:43 -07:00
8e36ed1ab6
[Test] Update task configuration to use and2 eblif
2021-02-02 15:01:15 -07:00
62803dc044
[Benchmark] Add eblif example for and2 benchmark
2021-02-02 14:59:31 -07:00
5e2847bc41
[Test] Update test case to use eblif file
2021-02-02 09:33:41 -07:00
39e6f62d91
[Benchmark] Use eblif in naming the adder_8 micro benchmark
2021-02-02 09:32:42 -07:00
d3397f6936
[Script] Remove activity from bitstream setting example script
2021-02-02 09:25:36 -07:00
9ff5e7926b
[Test] Update test case to use the adder benchmark
2021-02-02 09:24:39 -07:00
7f14dfbe87
[Script] Add example script to use bitstream setting
2021-02-02 09:18:08 -07:00
d83158654c
[Doc] Add a draft documentation about the bitstream setting
2021-02-01 22:33:17 -07:00
0c409b5bcc
[Tool] Add bitstream annotation support
2021-02-01 20:49:36 -07:00
faabdab815
[Tool] Remove redundant tab in bitstream setting writer
2021-02-01 18:04:21 -07:00
d5b1cc5ec7
[Tool] Bug fix in parser for bitstream settings
2021-02-01 18:01:42 -07:00
f102e84497
[Tool] Add bitstream setting file to openfpga library
2021-02-01 17:43:46 -07:00
04594cb7ab
[Test] Adapt bitstream annotatin file to parser's requirement
2021-02-01 17:38:36 -07:00
280c9620aa
[Test] Add an example bitstream annotation file
2021-02-01 16:01:21 -07:00
a6354fab7c
[Arch] Decide to move external bitstream definition to a separated XML file
2021-02-01 15:57:44 -07:00
df88e2adc0
[Arch] Add an example definition of external bitstream to openfpga arch with soft adder
2021-02-01 14:26:11 -07:00
10302752a7
[Arch] Bug fix in architecture. Now soft adder modes are accepted
2021-02-01 13:43:39 -07:00
tangxifan
ganeshgore
AurelienAlacchi
Andrew Pond
Lalit Sharma