[Doc] Now embed video in the documentation

docs/requirements.txt

@@ -8,6 +8,9 @@
 #Handle references in bibtex format
 sphinxcontrib-bibtex<2.0.0
 
+# Package required to embed youtube video
+sphinxcontrib-yt
+
 #Work-around bug "AttributeError: 'Values' object has no attribute 'character_level_inline_markup'" with docutils 0.13.1
 #See:
 #  * https://github.com/sphinx-doc/sphinx/issues/3951

docs/source/conf.py

@@ -30,6 +30,14 @@ try:
 except ImportError:
     have_sphinxcontrib_bibtex = False
 
+# Import sphinxcontrib.yt
+have_sphinxcontrib_youtube = True
+try:
+    import sphinxcontrib.yt
+except ImportError:
+    have_sphinxcontrib_youtube = False
+
+
 # -- Project information -----------------------------------------------------
 
 project = u'OpenFPGA'
@@ -57,6 +65,7 @@ extensions = [
     'sphinx.ext.graphviz',
     'sphinxcontrib.bibtex',
     'sphinx.ext.autosectionlabel',
+    'sphinxcontrib.yt',
 ]
 
 # Add any paths that contain templates here, relative to this directory.

docs/source/overview/motivation.rst

@@ -1,7 +1,9 @@
 Why OpenFPGA?
 -------------
 
-.. note:: If this is the first time you learn OpenFPGA, we strongly recommend you to watch the `introduction video <https://youtu.be/ocODUGcYGqo>`_ .
+.. note:: If this is the first time you learn OpenFPGA, we strongly recommend you to watch the introduction video.
+   
+.. youtube:: ocODUGcYGqo
 
 OpenFPGA aims to be an open-source framework that enables rapid prototyping of customizable FPGA architectures. As shown in :numref:`fig_openfpga_motivation`, a conventional approach will take a large group of experienced engineers more than one year to achieve production-ready layout and assoicated CAD tools. In fact, most of the engineering efforts are spent on manual layouts and developing ad-hoc CAD support.
 

docs/source/tutorials/compile.rst

@@ -3,7 +3,9 @@
 How to Compile
 --------------
 
-.. note:: A tutorial video about how-to-compile can be found `here <https://youtu.be/F9sMRmDewM0>`_
+.. note:: We recommend you to watch a tutorial video about how-to-compile before getting started
+
+.. youtube:: F9sMRmDewM0
 
 General Guidelines
 ~~~~~~~~~~~~~~~~~~

docs/source/tutorials/design_flow/generate_fabric.rst

@@ -3,7 +3,9 @@
 Generate Fabric Netlists
 ------------------------
 
-.. note:: A tutorial video can be found `here <https://youtu.be/aJ0OkZ1uh68>`_.
+.. note:: You may watch the video representation of this tutorial
+
+.. youtube:: aJ0OkZ1uh68
 
 This tutorial will show an example how to 
   - generate Verilog netlists for a FPGA fabric