tangxifan
|
e20ac5f272
|
[core] fixed a bug which cause configuration protocols other than ccff failed
|
2023-04-24 22:46:46 +08:00 |
|
tangxifan
|
18b078d1d5
|
[core] fixed bugs which cause ci failed
|
2023-04-24 21:20:07 +08:00 |
|
tangxifan
|
667d9df028
|
[core] developing testbench generator for ccff v2
|
2023-04-24 11:36:21 +08:00 |
|
tangxifan
|
ba90f5020b
|
[core] fixed some bugs which cause netlist generation failed
|
2023-04-23 16:48:14 +08:00 |
|
tangxifan
|
28b7a12f68
|
[core] code format
|
2023-04-23 14:31:35 +08:00 |
|
tangxifan
|
bd511ba515
|
[core] fixed syntax errors
|
2023-04-23 14:26:08 +08:00 |
|
tangxifan
|
592765af48
|
[core] code complete for upgrading netlist generator w.r.t. ccff v2
|
2023-04-23 13:57:37 +08:00 |
|
tangxifan
|
5500b9a289
|
[core] upgrading netlist generator
|
2023-04-22 16:27:27 +08:00 |
|
tangxifan
|
ea8ae29b53
|
[core] code format
|
2023-04-22 15:12:38 +08:00 |
|
tangxifan
|
297a23dee7
|
[core] fixed syntax errors
|
2023-04-22 15:09:39 +08:00 |
|
tangxifan
|
5e8e982334
|
[core] finished developing checkers
|
2023-04-22 12:44:34 +08:00 |
|
tangxifan
|
dba449f42a
|
[core] code complete for parsers
|
2023-04-21 23:45:35 +08:00 |
|
tangxifan
|
6e44f3f5fc
|
[core] developing ccff_v2 parsers
|
2023-04-21 17:01:51 +08:00 |
|
tangxifan
|
953625b1ca
|
[core] format
|
2023-03-05 22:32:05 -08:00 |
|
tangxifan
|
de1e300ec7
|
[core] now resize rr_node for clock graph is working
|
2023-03-05 22:21:55 -08:00 |
|
tangxifan
|
81e9187aac
|
[core] debugging
|
2023-03-03 22:55:14 -08:00 |
|
tangxifan
|
4423d917fa
|
[core] debugging
|
2023-03-03 18:00:43 -08:00 |
|
tangxifan
|
29ee6e7136
|
[core] debugging
|
2023-03-03 17:33:53 -08:00 |
|
tangxifan
|
98d8c75d86
|
[code] format
|
2023-03-02 21:36:08 -08:00 |
|
tangxifan
|
02b50e3464
|
[lib] now clock spine requires explicit definition of track type and direction when coordinate is vague
|
2023-03-02 21:33:32 -08:00 |
|
tangxifan
|
46510388be
|
[core] now fabric generator can wire clock ports to routing blocks
|
2023-03-02 12:33:26 -08:00 |
|
tangxifan
|
099d9f32f4
|
[core] dev
|
2023-03-01 16:08:15 -08:00 |
|
tangxifan
|
60ff298987
|
[lib] add new feature to enable clock tree connection to global ports of tiles
|
2023-02-28 22:36:41 -08:00 |
|
tangxifan
|
2ff8fb8737
|
[core] wrapping up clock routing command
|
2023-02-28 16:52:54 -08:00 |
|
tangxifan
|
8d5c21b14d
|
[core] code format
|
2023-02-27 23:00:15 -08:00 |
|
tangxifan
|
2735b708d3
|
[core] reworked the tapping XML syntax
|
2023-02-27 22:59:44 -08:00 |
|
tangxifan
|
ff69664c14
|
[core] syntax
|
2023-02-27 22:39:12 -08:00 |
|
tangxifan
|
d4e19edc71
|
[core] finishing up clock rr_graph appending
|
2023-02-27 22:31:16 -08:00 |
|
tangxifan
|
9f20d2e639
|
[lib] now clock arch supports tap points
|
2023-02-27 22:06:13 -08:00 |
|
tangxifan
|
3a40c5e15f
|
[lib] update example of clock arch definition
|
2023-02-27 21:49:14 -08:00 |
|
tangxifan
|
7d0c23c675
|
[lib] new api for lowest level clock connections
|
2023-02-27 15:16:23 -08:00 |
|
tangxifan
|
b3dec93eb9
|
[core] code format
|
2023-02-27 15:12:59 -08:00 |
|
tangxifan
|
9ec4d690db
|
[core] clock edges interconnecting clock tracks across levels
|
2023-02-27 15:10:36 -08:00 |
|
tangxifan
|
b6eace8fac
|
[core] now switch id is linked in clock network
|
2023-02-27 13:10:54 -08:00 |
|
tangxifan
|
009d711ba5
|
[core] code format
|
2023-02-26 22:23:41 -08:00 |
|
tangxifan
|
87a9146082
|
[core] adding rr spatial lookup for clock nodes only
|
2023-02-26 22:23:17 -08:00 |
|
tangxifan
|
db36f87dfa
|
[core] enhance clock tree arch validation
|
2023-02-26 18:39:53 -08:00 |
|
tangxifan
|
780fc0f26d
|
[core] developing validators and annotate rr_segment for clock arch
|
2023-02-26 18:03:55 -08:00 |
|
tangxifan
|
75773ddd4e
|
[code] format
|
2023-02-26 12:46:29 -08:00 |
|
tangxifan
|
3db5acfb37
|
[core] dev
|
2023-02-26 12:40:13 -08:00 |
|
tangxifan
|
8f0d94ba73
|
[code] format
|
2023-02-25 22:43:21 -08:00 |
|
tangxifan
|
0b33650761
|
[core] dev
|
2023-02-25 22:41:33 -08:00 |
|
tangxifan
|
7f07a9d031
|
[lib] add default seg/switch to clock arch. Fixed syntax
|
2023-02-24 19:15:39 -08:00 |
|
tangxifan
|
65b27a3377
|
[lib] fixed a few bugs
|
2023-02-22 21:29:18 -08:00 |
|
tangxifan
|
40f6b5a3fe
|
[lib] fixed a few bugs
|
2023-02-22 21:23:08 -08:00 |
|
tangxifan
|
a9d5e4dfbd
|
[lib] update example clock arch xml
|
2023-02-22 21:18:00 -08:00 |
|
tangxifan
|
d1133000ba
|
[lib] code format
|
2023-02-22 21:03:04 -08:00 |
|
tangxifan
|
aafd1e6fb3
|
[lib] syntax
|
2023-02-22 21:02:35 -08:00 |
|
tangxifan
|
b2ef1db5f4
|
[lib] finishing up code changes; start debugging
|
2023-02-22 20:46:18 -08:00 |
|
tangxifan
|
1c8a5eb098
|
[lib] adding linker
|
2023-02-22 20:29:32 -08:00 |