tangxifan
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97cca72590
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add spice support on power gated inverters
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2020-07-22 18:21:11 -06:00 |
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tangxifan
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8ade40713a
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add missing architecture for CI
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2020-07-22 14:07:39 -06:00 |
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tangxifan
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1a1c3885e7
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use k6 n10 in mux designs to speed up CI
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2020-07-22 13:54:09 -06:00 |
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tangxifan
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95c1fe61e1
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use k6 n8 in mux design to speed up CI
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2020-07-22 13:49:03 -06:00 |
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tangxifan
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f754c8af06
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use k6_n10 architecture to reduce CI runtime
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2020-07-22 13:45:55 -06:00 |
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tangxifan
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92c3449999
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bug fix in the regression test due to benchmark changes
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2020-07-22 13:17:05 -06:00 |
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tangxifan
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05dccadf21
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bug fix in the testcases using yosys_vpr flow
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2020-07-22 12:44:19 -06:00 |
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tangxifan
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7d39e136a4
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enrich micro benchmarks
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2020-07-22 12:33:52 -06:00 |
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tangxifan
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1d36de817f
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adapt generate bitstream testcase to use yosys vpr flow
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2020-07-22 12:24:34 -06:00 |
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tangxifan
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b96cdbf857
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adapt preconfig test cases to use yosys_vpr flow
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2020-07-22 12:23:39 -06:00 |
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tangxifan
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d8804f4ec1
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deploy yosys_vpr flow to basic regression tests
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2020-07-22 12:21:59 -06:00 |
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tangxifan
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f4e77e3bad
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Merge branch 'ganesh_dev' of https://github.com/LNIS-Projects/OpenFPGA into dev
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2020-07-22 12:09:34 -06:00 |
ganeshgore
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3b6cd885f3
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BugFix: Fixed yosys_vpr with openFPGA_Shell
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2020-07-22 11:57:04 -06:00 |
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ganeshgore
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226f1c703a
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Merge remote-tracking branch 'lnis_origin/master' into ganesh_dev
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2020-07-22 11:39:23 -06:00 |
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tangxifan
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b5fd6aa859
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add inverter subckt writer to FPGA-SPICE
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2020-07-17 13:01:08 -06:00 |
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tangxifan
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eb070694b5
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fine-tune on fast configuration for configuration chain and test case for tape-out-ish architecture
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2020-07-15 17:52:41 -06:00 |
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tangxifan
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c26c268dcd
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update documentation on fast configuration support for configuration chain
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2020-07-15 13:55:32 -06:00 |
Laboratory for Nano Integrated Systems (LNIS)
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ffc087336d
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Merge pull request #68 from LNIS-Projects/dev
Remove obsolete documentation and add technology binding
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2020-07-15 12:24:50 -06:00 |
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tangxifan
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7d1b524969
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deploy fast configuration chain test case to CI
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2020-07-15 11:57:12 -06:00 |
|
tangxifan
|
ca90f337a7
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add fast configuration chain test case
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2020-07-15 11:56:47 -06:00 |
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tangxifan
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66a50742fc
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use configuration chain in the k4k4 test case to speed up CI
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2020-07-15 11:56:11 -06:00 |
|
tangxifan
|
3f14fe62c7
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add fast configuration support for configuration chain protocol
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2020-07-15 11:44:23 -06:00 |
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tangxifan
|
862d71f57a
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remove obselete vpr7 XML syntax from documentation
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2020-07-15 11:13:47 -06:00 |
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tangxifan
|
cb0df2c1c6
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update doc about technology binding between circuit library and device library
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2020-07-15 11:05:33 -06:00 |
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tangxifan
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de4586217f
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now device binding is not mandatory for circuit models
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2020-07-14 12:04:22 -06:00 |
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tangxifan
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e2b492f184
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add circuit model tech binding
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2020-07-13 20:35:10 -06:00 |
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tangxifan
|
1c5bede282
|
update arch file with device technology binding information
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2020-07-13 19:06:51 -06:00 |
|
Laboratory for Nano Integrated Systems (LNIS)
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cf9e412d84
|
Merge pull request #67 from LNIS-Projects/dev
hotfix on treating the dangling ports in pb_graph for analysis SDC ge…
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2020-07-10 09:00:22 -06:00 |
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tangxifan
|
1b55dfb441
|
hotfix on treating the dangling ports in pb_graph for analysis SDC generator
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2020-07-09 23:28:42 -06:00 |
|
Laboratory for Nano Integrated Systems (LNIS)
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3c77deb987
|
Merge pull request #66 from LNIS-Projects/docker
Updated Dockerfile for Ubuntu 18.04
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2020-07-09 16:17:05 -06:00 |
|
tangxifan
|
2b4be83e0a
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Merge pull request #64 from LNIS-Projects/dev
using a unified string to replace multi net names to save memory of b…
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2020-07-09 10:10:33 -06:00 |
lnis
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8037380659
|
.
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2020-07-09 09:25:11 -06:00 |
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tangxifan
|
62fd0947f5
|
using a unified string to replace multi net names to save memory of bitstream database
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2020-07-08 16:28:20 -06:00 |
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tangxifan
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c5f718b105
|
Merge pull request #63 from LNIS-Projects/dev
Improve runtime of fabric key loading; Documentation update for different file format of fabric keys
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2020-07-07 11:16:32 -06:00 |
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tangxifan
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65dfc545c1
|
update documentation for fabric key
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2020-07-07 10:28:29 -06:00 |
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tangxifan
|
66e5e141a1
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improve fabric key loader to reduce runtime
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2020-07-07 10:19:34 -06:00 |
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tangxifan
|
f246da6538
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Merge pull request #62 from LNIS-Projects/dev
Simplify fabric key where users just need to provide alias; start porting FPGA-SPICE
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2020-07-06 18:01:20 -06:00 |
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tangxifan
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7615db2be6
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update documentation for the new fabric key rules
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2020-07-06 16:44:21 -06:00 |
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tangxifan
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824b56f14c
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fabric key can now accept instance name only; decoders are no longer part of the key
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2020-07-06 16:42:33 -06:00 |
|
tangxifan
|
462fc0d04e
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add spice transistor wrapper writer
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2020-07-05 14:50:29 -06:00 |
|
tangxifan
|
b38ee0e8be
|
add spice writer functions
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2020-07-05 13:58:05 -06:00 |
|
tangxifan
|
81171a8f97
|
start transplanting FPGA-SPICE
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2020-07-05 12:10:12 -06:00 |
|
tangxifan
|
1ad6e8292a
|
move constants from verilog domain to common so that FPGA-SPICE can share
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2020-07-05 11:39:46 -06:00 |
|
tangxifan
|
7c2a0a6ad2
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streamline fabric verilog options
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2020-07-05 11:28:14 -06:00 |
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tangxifan
|
83e26adf90
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add module usage types for future FPGA-SPICE development
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2020-07-04 22:33:54 -06:00 |
|
tangxifan
|
1ef32c5acb
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Merge pull request #61 from LNIS-Projects/dev
Remove obsolete codes and restructure compilation options
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2020-07-04 20:00:51 -06:00 |
|
tangxifan
|
ece262f544
|
remove debug mode in compilation guidelines as we can use release in default now
|
2020-07-04 19:19:06 -06:00 |
|
tangxifan
|
1e6955aaa4
|
rename arch directory to be clear for its usage
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2020-07-04 19:13:28 -06:00 |
|
tangxifan
|
f9a2bb0490
|
Reorganize task directory
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2020-07-04 19:06:41 -06:00 |
|
tangxifan
|
7f5710276f
|
now use release mode in CI compilation
|
2020-07-04 17:32:31 -06:00 |