tangxifan
|
149d5b20bd
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[Regression Test] Add test case for fixed device support
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2020-09-23 16:47:11 -06:00 |
tangxifan
|
c92cf71891
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[Regression Test] Add a new template script for fixed device support
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2020-09-23 16:46:41 -06:00 |
tangxifan
|
6ed05d380b
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[Regression Test] Deploy pattern based local routing test case to CI
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2020-09-23 16:08:01 -06:00 |
tangxifan
|
3350695806
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[Regression test] Add test case for pattern based local routing architecture
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2020-09-23 16:06:47 -06:00 |
tangxifan
|
1aab691e9d
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[Architecture] Add openfpga architecture using pattern based local routing
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2020-09-23 16:06:16 -06:00 |
tangxifan
|
951a47b19c
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[Architecture] Add k4 series architecture using pattern-based local routing
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2020-09-23 16:05:39 -06:00 |
tangxifan
|
6480b06a2d
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[OpenFPGA tool] Remove out-of-data test blif, architecture and scripts
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2020-09-23 11:01:53 -06:00 |
tangxifan
|
7729f671ab
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[Regression Tests] Remove deadlink
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2020-09-22 18:35:41 -06:00 |
tangxifan
|
8f4cca789a
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[Regression Test] Add k4n4 with fracturable multiplier test case to CI
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2020-09-22 15:34:44 -06:00 |
tangxifan
|
51c0319657
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[Regression tests] Add test case for the k4n4 with fracturable 32-bit multiplier
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2020-09-22 15:32:54 -06:00 |
tangxifan
|
70b8b02f74
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[Architecture] Add vpr architecture for k4n4 with fracturable 32-bit multiplier
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2020-09-22 15:32:11 -06:00 |
tangxifan
|
72749be4bd
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[Architecture] Add OpenFPGA architecture for k4n4 with fracturable 32-bit multiplier
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2020-09-22 15:31:34 -06:00 |
tangxifan
|
61bcbaafd8
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[Architecture] Add Verilog HDL for fracturable 32-bit multiplier
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2020-09-22 15:15:19 -06:00 |
tangxifan
|
a61d161cbe
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[Regression Test] Deploy k4n4 with multiple segments to CI
|
2020-09-22 12:48:53 -06:00 |
tangxifan
|
3d1f49fb2f
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[Regression Test] Add testcase for k4n4 with multiple segments
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2020-09-22 12:47:41 -06:00 |
tangxifan
|
801055b007
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[OpenFPGA Tool] Bug Fix on the tileable RRG for multi segment
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2020-09-22 12:47:02 -06:00 |
tangxifan
|
13df6c1c21
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[Architecture] Add openfpga architecture for k4n4 using multiple segments
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2020-09-22 12:36:11 -06:00 |
tangxifan
|
8a3934b749
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[Architecture Add vpr architecture for k4n4 using multiple wire segments
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2020-09-22 12:35:39 -06:00 |
tangxifan
|
8fff2b77eb
|
[Regression Test] Deploy k4n4 BRAM test case to CI
|
2020-09-22 12:24:54 -06:00 |
tangxifan
|
5741664580
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[Regression Test] Add test case for k4n4 bram architecture
|
2020-09-22 12:23:56 -06:00 |
tangxifan
|
ddf999b6b9
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[Architecture] Add verilog HDL for dual-port BRAM 1k
|
2020-09-22 12:23:28 -06:00 |
tangxifan
|
26fba4a94b
|
[Architecture] Add openfpga architectue for k4n4 with bram blocks
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2020-09-22 12:22:59 -06:00 |
tangxifan
|
daf776b7b1
|
[Architecture] Add k4n4 architecture with bram block for basic tests
|
2020-09-22 12:22:32 -06:00 |
tangxifan
|
237fc2e636
|
[Regression test] Deploy no local routing in basic tests to CI
|
2020-09-22 11:49:16 -06:00 |
tangxifan
|
3bf94b8e34
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[Regression test] Remove no local routing from fpga verilog tests
|
2020-09-22 11:48:19 -06:00 |
tangxifan
|
7ed9f76b06
|
[Regression test] Move k4n4 no local routing to basic test
|
2020-09-22 11:47:03 -06:00 |
tangxifan
|
2dea97afb6
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[Regression test] reduce runtime for k4n4 test in basic testing
|
2020-09-22 11:45:29 -06:00 |
tangxifan
|
2881312637
|
[Regression test] deploy k4 series test cases to CI
|
2020-09-22 11:43:34 -06:00 |
tangxifan
|
ea4dd410b7
|
[Regression Test] Add k4n4 fracturable lut test case to basic test
|
2020-09-22 11:41:36 -06:00 |
tangxifan
|
dad19cac9a
|
[Regression test] Add k4 series architecture: fracturable adder
|
2020-09-22 11:39:18 -06:00 |
tangxifan
|
dd192a2f54
|
[Architecture] Add a k4k4 openfpga architecture with carry chain for quick test
|
2020-09-22 11:34:23 -06:00 |
tangxifan
|
7a6f5a06f7
|
[Architecture] Add a k4n4 architecture with carry chain to quick test
|
2020-09-22 11:33:56 -06:00 |
tangxifan
|
aa5f5fc7e0
|
[Architecture] Bring back pin equivalence for no local routing architecture
|
2020-09-21 22:22:39 -06:00 |
tangxifan
|
26f1a5d9ec
|
[OpenFPGA Tool] Bug fix for repacking no local routing architecture
|
2020-09-21 22:22:03 -06:00 |
tangxifan
|
a8a269aa82
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[Architecture] Temporary patch for the no local routing architecture
|
2020-09-21 19:51:23 -06:00 |
tangxifan
|
acf318f184
|
[Regression test] Bug fix in test case fabric_chain
|
2020-09-21 18:58:35 -06:00 |
tangxifan
|
e4291eb27e
|
[Regression Tests] Now use fixed device layout in test cases for best coverage
|
2020-09-21 18:44:13 -06:00 |
tangxifan
|
7a57cc9cf4
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[Architecture] A new device layout to k4n4 to test untileable architecture
|
2020-09-21 18:36:50 -06:00 |
tangxifan
|
2bbfcb5753
|
[Architecture] Add a new device layout to k4n4 for testing tileable routing
|
2020-09-21 18:34:31 -06:00 |
tangxifan
|
e1c5947143
|
[Architecture] Add auto layout and fixed layout to architectures
|
2020-09-21 18:01:51 -06:00 |
tangxifan
|
936a164eee
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[OpenFPGA flow] Add a new template script to use a fixed device layout
|
2020-09-21 17:48:28 -06:00 |
tangxifan
|
d7f8b3abad
|
[Architecture] Add k4 N4 untilable architecture
|
2020-09-21 17:44:37 -06:00 |
tangxifan
|
a83bc3f75c
|
[Regression tests] Add test cases for the fracturable LUT4 architecture and deploy it to CI
|
2020-09-21 17:38:16 -06:00 |
tangxifan
|
e9c0e90544
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[Architecture] Add a VPR architectue using fracturable LUT4
|
2020-09-21 17:37:26 -06:00 |
tangxifan
|
60f328a2ab
|
[Architecture] Add openfpga architecture for a small k4 fracturable FPGA
|
2020-09-21 17:36:57 -06:00 |
tangxifan
|
c6ac02d210
|
[FPGA-SPICE] Add VDD/VSS ports to SPICE subckt instanciation
|
2020-09-20 15:21:33 -06:00 |
tangxifan
|
e867e203f4
|
[Documentation] Use release mode in Docker settings
|
2020-09-20 15:00:56 -06:00 |
tangxifan
|
544c44fe46
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[FPGA-SPICE] Add VDD and VSS port to module definition
|
2020-09-20 14:58:15 -06:00 |
tangxifan
|
615a24999a
|
[Documentation] Remove out-of-date description
|
2020-09-20 14:45:33 -06:00 |
tangxifan
|
460fef5807
|
[FPGA-Verilog] Rename files and functions to distinguish from FPGA-SPICE files and functions
|
2020-09-20 12:58:55 -06:00 |