[Architecture] Temporary patch for the no local routing architecture
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@ -54,10 +54,10 @@
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<equivalent_sites>
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<site pb_type="clb"/>
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</equivalent_sites>
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<input name="I0" num_pins="4" equivalent="full"/>
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<input name="I1" num_pins="4" equivalent="full"/>
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<input name="I2" num_pins="4" equivalent="full"/>
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<input name="I3" num_pins="4" equivalent="full"/>
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<input name="I0" num_pins="4" equivalent="none"/>
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<input name="I1" num_pins="4" equivalent="none"/>
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<input name="I2" num_pins="4" equivalent="none"/>
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<input name="I3" num_pins="4" equivalent="none"/>
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<output name="O" num_pins="4" equivalent="none"/>
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<clock name="clk" num_pins="1"/>
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<fc in_type="frac" in_val="0.15" out_type="frac" out_val="0.10"/>
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@ -207,10 +207,14 @@
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routing area up significantly, we estimate into the ~70% range.
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-->
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<pb_type name="clb">
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<input name="I0" num_pins="4" equivalent="full"/>
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<input name="I1" num_pins="4" equivalent="full"/>
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<input name="I2" num_pins="4" equivalent="full"/>
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<input name="I3" num_pins="4" equivalent="full"/>
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<!-- FIXME These inputs should be logic equivalent
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However, current annotation engine does not support this
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The feature should be enabled after patching
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-->
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<input name="I0" num_pins="4" equivalent="none"/>
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<input name="I1" num_pins="4" equivalent="none"/>
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<input name="I2" num_pins="4" equivalent="none"/>
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<input name="I3" num_pins="4" equivalent="none"/>
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<output name="O" num_pins="4" equivalent="none"/>
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<clock name="clk" num_pins="1"/>
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<!-- Describe basic logic element.
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