This patch adds support for a KaRo TX27 CPU module on a StarterkitV base board.
The register settings have been extracted from a RedBoot distribution
that is distributed along with the hardware by KaRo.
This setup has been tested with a JTAGKey. The testing has been focussed
on loading a program into memory and start execution.
Although the flash seems to be correctly detected, no effort has been put
in testing the NAND programming yet.
Change-Id: Ib17763f1e3ecacd0eb9b5fdc32f8cba7a5e59be5
Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
Reviewed-on: http://openocd.zylin.com/158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There are many "force an error till we get a good number" comments in
target/board files. This refers to the use-case where a config script
sets _CPUTAPID to 0xffffffff (which presumely gets overridden later):
if { [info exists CPUTAPID ] } {
set _CPUTAPID $CPUTAPID
} else {
# Force an error until we get a good number.
set _CPUTAPID 0xffffffff
}
However, the same comment was also copy-pasted in many files which do
_not_ set _CPUTAPID to 0xffffffff, where the comment doesn't make any
sense at all. Drop those comments. Also, add one missing comment, and
fix small whitespace and grammar issues.
Change-Id: Ic4ba3b5ccba87ed40cea0d6a7d66609fbdfa3c71
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/136
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The STM3220G-EVAL board has an STM32F207IGH6. ("...H6", not "...T6").
Change-Id: Iaf3dae6830c5c0685a1dcd1588d391434bc51be7
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Reviewed-on: http://openocd.zylin.com/120
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.
The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.
Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
Gumstix Verdex is a PXA270-based series of computer-on-modules. This
configuration file is based off the voipac.cfg configuration with
a different flash memory configuration. This has been tested flyswatter
adapter to reflash a Gumstix Verdex XL6P board.
Currently the board/redbee-*.cfg files incorrectly include the
interface definition. Move the interfaces to interface/,
and create a single board/redbee.cfg that is common to both boards.
Intended usage is now:
openocd -f interface/redbee-econotag.cfg -f board/redbee.cfg
The following mini6410/tiny6410 functions are available:
init_6410 - initialize clock, timer, DRAM
init_6410_flash - initializes NAND flash support
install_6410_uboot - copies u-boot image into RAM and runs it
all at91sam9 are nearly the same except sram and soc name
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
End of line comments fixed with ';' before '#'.
Added few additional 'space' to keep indentation in
multi-line comments.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the
targets 'reset_config' setting. Previously we ignored the srst setting
for luminary targets.
Luminary targets have never supported using srst to reset into debug mode
so remove the option from the target configs files.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
STMicroelectronics controller SMI is not SPEAr specific.
Rename it and change name to every symbol in the code.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Initial support for ST SPEAr310 and for the evaluation
board EVALSPEAr310 Rev. 2.0.
Scripts are split in generic for SPEAr3xx family and
specific for SPEAr310. This should easily allow adding
new members of the family.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
measure_clk indicates ca. 3-4MHz, so 1MHz should be safe.
Added self_test proc used to test that rclk worked.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.
I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- Update all Luminary config's to use a common target/stellaris.cfg.
- Add Luminary ek-lm3s6965 config.
- Increase working area for boards with more ram.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.
I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.
The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.
local.cfg:
gdb_memory_map disable
gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on
Comments welcome.
Best Regards,
Ben Gardiner
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
- Add missing id for the str750 that is also in the jtag chain.
- Reduce jtag startup speed to 500kHz.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Register name fix; ref. TI document sprueh7d
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I was finally able to figure out the cause of this problem. There are two
parts to the patch. The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:
+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before. This was the real issue that was causing
the timing problems I identified before. This solution was confirmed with
an o-scope on actual target hardware.
+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler. When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).
+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).
+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier. Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
The ecosflash driver is no longer used by any of the config
scripts. It is more useful to get more testing of CFI.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Some tcl script has underline between the words "flash bank"
resulting in 'invalid command name "flash_bank"'.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.
Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
the target name
- the comment line above the command does not report
actual syntax
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ... it needs to be used with
non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ... it needs to be used with non-JTAG
transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ... it needs to be used with non-JTAG transports
Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break. That aid should Sunset in about a year. (We may want to
update it to include a nag message too.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Talk more about "debug adapters" instead of only "dongles". Not all
adapters are discrete widgets; some are integrated onto boards. If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).
Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)
Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix some issues with the generic LPC1768 config file:
- Handle the post-reset clock config: 4 MHz internal RC, no PLL.
This affects flash and JTAG clocking.
- Remove JTAG adapter config; they don't all support trst_and_srst
- Remove the rest of the bogus "reset-init" event handler.
- Allow explicit CCLK configuration, instead of assuming 12 MHz;
some boards will use 100 Mhz (or the post-reset 4 MHz).
- Simplify: rely on defaults for endianness and IR-Capture value
- Update some comments too
Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.
Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes. Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).
It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The Redbee Econotag is an open hardware development kit from
Redwire, LLC (www.redwirellc.com/store), for the Freescale
MC13224V ARM7TDMI + 802.15.4 radio.
It includes both an MC13224V and an FT2232H (for JTAG and UART
support). It has flexible power supply options.
Additional features are:
- inverted-F pcb antenna
- 36 GPIO brought out to 0.1" pin header
(includes all peripheral pins)
- Reset button
- Two push buttons (on kbi1-5 and kbi0-4)
- USB-A connector, powered from USB
- up to 16V external input
- pads for optional buck inductor
- pads for optional 32.768kHz crystal
- 2x LEDS on TX_ON and RX_ON
[ dbrownell@users.sourceforge.net: shrink lines; texi ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Get rid of new nasty warning:
NOTE! Severe performance degradation without fast memory access enabled...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.
Set correct CPUTAPID. Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Don't give the same names to both flash chips on two OMAP boards.
For OSK, enable DCC downloads (removing a warning).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Most of this patch updates documentation and comments for various
Luminary boards, supporting two bug fixes by helping to make sense
of the current mess:
- Recent rev C lm3s811 eval boards didn't work. They must use
the ICDI layout, which sets up some signals that the older
boards didn't need. This is actually safe and appropriate
for *all* recent boards ... so just make "luminary.cfg" use
the ICDI layout.
- "luminary-lm3s811.cfg", was previously unusable! No VID/PID;
and the wrong vendor string. Make it work, but reserve it
for older boards where the ICDI layout is wrong.
- Default the LM3748 eval board to "luminary.cfg", like the
other boards. If someone uses an external JTAG adapter, all
boards will use the same workaround (override that default).
The difference between the two FT2232 layouts is that eventually
the EVB layout will fail cleanly when asked to enable SWO trace,
but the ICDI layout will as cleanly be able to enable it. Folk
using "luminary.cfg" with Rev B boards won't see anything going
wrong until SWO support is (someday) added.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This config is only lightly tested, and doesn't work well yet;
but it's a start.
* Notably missing is PLL configuration, since each DaVinci
does that just a bit differently; and thus DDR2 setup.
* The SRST workaround needed for the goof in the CPLD's VHDL
depends on at least the not-yet-merged patch letting ARM9
(and ARM7) chips perform resets that don't use SRST.
So this isn't yet suitable for debugging U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This updates the board configuration for the SAM9-L9260 board with the
configuration for the on-board NAND and dataflash. Included are commands
for configuring the AT91SAM9 NAND flash driver.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
General rule, this is all board-specific and doesn't belong
in target config files. Some of these were just cosmetic.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's been about a year since these were deprecated and, in most
cases, removed. There's no point in carrying that documentation,
or backwards compatibility for "jtag_device" and "jtag_speed",
around forever. (Or a few remnants of obsolete code...)
Removed a few obsolete uses of "jtag_speed":
- The Calao stuff hasn't worked since July 2008. (Those Atmel
targets need to work with a 32KHz core clock after reset until
board-specific init-reset code sets up the PLL and enables a
faster JTAg clock.)
- Parport speed controls don't actually work (tops out at about
1 MHz on typical HW).
- In general, speed controls need to live in board.cfg files (or
sometimes target.cfg files), not interface.cfg ...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The semantics of "-work-area-virt 0" (or phys) changed with
the patch to require specifying physical or virtrual work
area addresses. Specifying zero was previously a NOP. Now
it means that address zero is valid.
This patch addresses three related issues:
- MMU-less processors should never specify work-area-virt;
remove those specifications. Such processors include
ARM7TDMI, Cortex-M3, and ARM966.
- MMU-equipped processors *can* specify work-area-virt...
but zero won't be appropriate, except in mischievous
contexts (which hide null pointer exceptions).
Remove those specs from those processors too. If any of
those mappings is valid, someone will need to submit a
patch adding it ... along with a comment saying what OS
provides the mapping, and in which context. Example,
say "works with Linux 2.6.30+, in kernel mode". (Note
that ARM Linux doesn't map kernel memory to zero ...)
- Clarify docs on that "-virt" and other work area stuff.
Seems to me work-area-virt is quite problematic; not every
operating system provides such static mappings; if they do,
they're not in every MMU context...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Config for Intel's "Lubbock" PXA255 development board. Even more
so than the PXA255 itself, this is obsolete. AFAIK this was the
first generally available development platform for PXA255. Intel
stopped providing these after other devel boards became available.
One interesting thing about this board from the OpenOCD perspective
is probably its flash configuration. Each bank is 32 bits wide,
built from two 16-bit StrataFlash chips wired in parallel. This
doubles throughput ... it reads/writes 32 bits in the time a single
chip takes to write just 16 bits.
This conf mostly works, given XScale bugfixes, but has some issues
(notably: no access to the on-board SDRAM) flagged by FIXMEs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This is the very basic board config for the balloon3 board cpu JTAG
channel.
The rest of the config comprises another 14 .cfg files which I suspect
openocd doesn't really want all of. I'm still not sure how to deal
with this. I'll post another mail/patch to discuss.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Ofrwarded from Ron, who's not subscribed.
----- Forwarded message from Ron <ron@debian.org> -----
From: Ron <ron@debian.org>
Date: Wed, 14 Oct 2009 04:50:17 +1030
To: wookey@debian.org
Subject: [PATCH] OpenRD board configuration
X-Spam-Status: No, score=-3.6 required=4.5 tests=BAYES_00,RCVD_IN_DNSWL_LOW
autolearn=ham version=3.2.5
This piggybacks on the 'sheevaplug' layout which uses the same Kirkwood SoC.
Signed-off-by: Ron Lee <ron@debian.org>
This is clearly noted in the hardware spec (section 5.2.3); it
works around a chip erratum: "If the MPU_RESET signal is used,
it may cause the EMIFS bus to lock."
I seem to have a board with such an initial build. The chip
is labeled XOMAP. Presumably, parts without that "X" prefix
(eXperimental) resolve this.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Update the board config for the DaVinci DM355 EVM so the reset-init
event handler does the rest of the work it should do:
- minor PLL setup bugfixes
- initialize the DDR2 controller
- probe both NAND banks
- initialize UART0
- enable the icache
git-svn-id: svn://svn.berlios.de/openocd/trunk@2699 b42882b7-edfa-0310-969c-e2dbd0fdcd60
defining ntrst_delay is pointless; don't.
At least the LM3S3748 eval board doesn't need nsrst_delay
either; remove that too.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2645 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add flash programming support for NXP LPC1700 cortex_m3 based family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Prepare the DaVinci PLL code to support the version 0x0E module
used in newer chips (e.g. dm365): rename the original code so
it's specific to version 0x02 PLL modules, and update the dm355evm
code to use that new name.
Fix two minor bugs in that version 2 code: sysclk3 setup used
the sysclk2 divider address (affecting video processing on dm355,
no worry for now) and sysclk2 setup had a syntax error.
Also minor fixups to dm355evm, mostly to permit use of RTCK.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2447 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This patch adds support for the Luminary Micro LM3S9B90 target and
LM3S9B92 Evaluation Kit. These kits include a new ft2232 adapter, the
Luminary In-Circuit Debug Interface (ICDI) Board, so this is added as a
new ft2232 layout called "luminary_icdi".
git-svn-id: svn://svn.berlios.de/openocd/trunk@2429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Improve the PXA255 target config: move all that board-specific
setup to the pxa255_sst board.cfg, to which it evidently belongs
(it's the only PXA255 board now included).
Provide the PXA255 JTAG id from Intel docs, and add a comment
about how this chip is now EOL'd (last orders taken).
Note that I still can't get my old PXA255 board to work. There's
something broken in the reset sequence, which is preventing the
TAP from coming up at all. Old mailing list posts suggest this
is a longstanding bug...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2416 b42882b7-edfa-0310-969c-e2dbd0fdcd60
source the STM32 target config instead of using a private clone
git-svn-id: svn://svn.berlios.de/openocd/trunk@2352 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Update the Beagle setup:
- OMAP3530 updates:
* split ICEpick TAP enable support to its own file, for
reuse and eventually for storing other utility code
like emulation reset
* clean up, including labeling the tap as for DAP not
for the Cortex-A8 and making endianness non-variable
* add a few FIXMEs
- BeagleBoard cleanup: there's no SRST, "endstate" is gone, etc
I'm not sure I'd say it's further than "barely limping" just yet.
Key issues remain lack of Cortex-A8 support, and more complete
support for resetting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2267 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Fix for a goofy "board" config ... reuse target/pxa270.cfg
instead of using a private copy.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2266 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add another board ... OMAP2420 "H4" board. This won't be very widely
used with OpenOCD, but with mainline support in both U-Boot and Linux
it at least makes for a more complete set (and another testcase).
This is incomplete support in several respects. The ARM11 support is
not very deep yet; most registers aren't available, and the ETM can't
be hooked up. Plus, there's no script for OMAP-specific stuff like
setting up the SDRAM controller. Eventually the same NAND controller
driver should work with OMAP2 and OMAP3.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2242 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Tweak the csb337 code so that it doesn't enable alignment traps when
it completes the "reset init" sequence. It turns out that the current
CFI code reliably triggers such traps.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2179 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Add configuration for an old AT91rm9200 board, the Cogent CSB 337.
Worth noting from the OpenOCD perspective:
- It got a real hardware trace port connector; wired up here as
much as we can, lacking inexpensive trace-aware dongles.
- This is the first in-tree use of the "arm920t cp15" command.
It adjusts the CPU clocking and enables i-cache, which gives
more than 4x speedup after booting Linux; it's visible even
just running U-Boot.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2134 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This is the missing half of the r1974 patch:
OSK5912 board support, which was split out from
the omap5912 target config.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1985 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Spencer Oliver
Mark Vels
Uwe Hermann
Jim Norris
Marti Bolivar
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