cfg: update scripts to use new stm32 driver names

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
This commit is contained in:
Spencer Oliver 2011-07-28 11:45:09 +01:00
parent c73342fbe7
commit 89f593d8cb
11 changed files with 12 additions and 12 deletions

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@ -5,7 +5,7 @@ reset_config trst_and_srst
source [find interface/stm32-stick.cfg]
set CHIPNAME stm32_hitex
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]
# configure str750 connected to jtag chain
# FIXME -- source [find target/str750.cfg] after cleaning that up

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@ -4,4 +4,4 @@
# Work-area size (RAM size) = 20kB for STM32F103RB device
set WORKAREASIZE 0x5000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]

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@ -5,4 +5,4 @@
# Work-area size (RAM size) = 64kB for STM32F107VC device
set WORKAREASIZE 0x10000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]

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@ -4,4 +4,4 @@
# The chip has only 8KB sram
set WORKAREASIZE 0x2000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]

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@ -4,4 +4,4 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]

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@ -4,4 +4,4 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]

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@ -4,7 +4,7 @@
# increase working area to 32KB for faster flash programming
set WORKAREASIZE 0x8000
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]
#
# configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash

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@ -8,4 +8,4 @@ set WORKAREASIZE 0x20000
# chip name
set CHIPNAME STM32F207IGT6
source [find target/stm32f2xxx.cfg]
source [find target/stm32f2x.cfg]

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@ -68,7 +68,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32x 0x08000000 0 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset

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@ -57,5 +57,5 @@ target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNA
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2xxx 0 0 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME

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@ -1,6 +1,6 @@
# script for stm32xl family (dual flash bank)
source [find target/stm32.cfg]
source [find target/stm32f1x.cfg]
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash1
flash bank $_FLASHNAME stm32x 0x08080000 0 0 0 $_TARGETNAME
flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME