cfg: update Luminary config files
- Update all Luminary config's to use a common target/stellaris.cfg. - Add Luminary ek-lm3s6965 config. - Increase working area for boards with more ram. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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@ -13,7 +13,8 @@
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source [find interface/luminary.cfg]
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# include the target config
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source [find target/lm3s1968.cfg]
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set CHIPNAME lm3s1968
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source [find target/stellaris.cfg]
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# jtag speed
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adapter_khz 3000
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@ -5,6 +5,9 @@
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# so is using it in JTAG mode, as done here.
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source [find interface/luminary.cfg]
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# 20k working area
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set WORKAREASIZE 0x4000
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set CHIPNAME lm3s3748
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source [find target/stellaris.cfg]
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# Board has only srst
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@ -0,0 +1,19 @@
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#
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# TI/Luminary Stellaris LM3S6965 Evaluation Kits
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#
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# http://www.luminarymicro.com/products/lm3s6965_ethernet_evaluation_kit.html
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# NOTE: using the on-board FT2232 JTAG/SWD/SWO interface is optional!
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# so is using it in JTAG mode, as done here.
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source [find interface/luminary.cfg]
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# 20k working area
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set WORKAREASIZE 0x5000
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set CHIPNAME lm3s6965
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# include the target config
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source [find target/stellaris.cfg]
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adapter_nsrst_delay 100
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# LM3S6965 Evaluation Board has only srst
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reset_config srst_only
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@ -8,9 +8,8 @@
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# NOTE: older '811-EK boards (before rev C) shouldn't use this.
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source [find interface/luminary.cfg]
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set CHIPNAME lm3s811
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# include the target config
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set CHIPNAME lm3s811
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source [find target/stellaris.cfg]
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@ -8,7 +8,10 @@
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# NOTE: using the bundled FT2232 JTAG/SWD/SWO interface is optional!
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# so is using in JTAG mode, as done here.
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source [find interface/luminary-icdi.cfg]
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source [find target/lm3s9b9x.cfg]
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set WORKAREASIZE 0x4000
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set CHIPNAME lm3s9b9x
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source [find target/stellaris.cfg]
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# jtag speed
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adapter_khz 500
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@ -1,29 +0,0 @@
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# Script for TI/Luminary Stellaris LM3S1968
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lm3s1968
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x3ba00477
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}
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
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# 8k working area at base of ram, not backed up
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
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#flash configuration
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
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@ -1,38 +0,0 @@
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# TI/Luminary Stellaris lm3s6965
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lm3s6965
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x3ba00477
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}
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# jtag speed
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adapter_khz 500
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#LM3S6965 Evaluation Board has only srst
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reset_config srst_only
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
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# 8k working area at base of ram, not backed up
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
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#flash configuration
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
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@ -1,33 +0,0 @@
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#
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# Luminary Micro Stellaris LM3S9B9x Microcontroller
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#
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# http://www.luminarymicro.com/products/lm3s9b90.html
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# http://www.luminarymicro.com/products/lm3s9b92.htm
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lm3s9b9x
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# Fourth generation "Tempest" device
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set _CPUTAPID 0x4ba00477
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}
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
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#Cortex-M3 with Luminary lm3s variant
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
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# 16k working area at base of ram, not backed up
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x4000
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#flash configuration
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
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@ -18,6 +18,12 @@ if { [info exists CPUTAPID ] } {
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set _CPUTAPID 0x0ba00477
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}
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if { [info exists WORKAREASIZE ] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x2000
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
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-expected-id $_CPUTAPID -ignore-version
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@ -33,7 +39,7 @@ target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu \
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# NOTE: you may need or want to reconfigure the work area;
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# some parts have just 6K, and you may want to use other
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# addresses (at end of mem not beginning) or back it up.
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
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# JTAG speed ... slow enough to work with a 12 MHz RC oscillator;
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# LM3S parts don't support RTCK
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