rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. (We may want to update it to include a nag message too.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
parent
4b964a81ca
commit
96f9790279
5
NEWS
5
NEWS
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@ -5,6 +5,11 @@ and other issues not mentioned here.
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JTAG Layer:
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New driver for "Bus Pirate"
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Rename various commands so they're not JTAG-specific
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There are migration procedures for these, but you should
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convert your scripts to the new names, since those procedures
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will not be around forever.
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jtag_khz ... is now adapter_khz
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Boundary Scan:
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@ -1516,7 +1516,7 @@ solution just avoids using that instruction with JTAG debuggers.
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If both the chip and the board support adaptive clocking,
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use the @command{jtag_rclk}
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command, in case your board is used with JTAG adapter which
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also supports it. Otherwise use @command{jtag_khz}.
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also supports it. Otherwise use @command{adapter_khz}.
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Set the slow rate at the beginning of the reset sequence,
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and the faster rate as soon as the clocks are at full speed.
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@ -2342,7 +2342,7 @@ you may encounter a problem.
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@deffn Command {parport_toggling_time} [nanoseconds]
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Displays how many nanoseconds the hardware needs to toggle TCK;
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the parport driver uses this value to obey the
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@command{jtag_khz} configuration.
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@command{adapter_khz} configuration.
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When the optional @var{nanoseconds} parameter is given,
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that setting is changed before displaying the current value.
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@ -2353,7 +2353,7 @@ To measure the toggling time with a logic analyzer or a digital storage
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oscilloscope, follow the procedure below:
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@example
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> parport_toggling_time 1000
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> jtag_khz 500
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> adapter_khz 500
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@end example
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This sets the maximum JTAG clock speed of the hardware, but
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the actual speed probably deviates from the requested 500 kHz.
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@ -2364,14 +2364,14 @@ Update the setting to match your measurement:
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@example
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> parport_toggling_time <measured nanoseconds>
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@end example
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Now the clock speed will be a better match for @command{jtag_khz rate}
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Now the clock speed will be a better match for @command{adapter_khz rate}
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commands given in OpenOCD scripts and event handlers.
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You can do something similar with many digital multimeters, but note
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that you'll probably need to run the clock continuously for several
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seconds before it decides what clock rate to show. Adjust the
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toggling time up or down until the measured clock rate is a good
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match for the jtag_khz rate you specified; be conservative.
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match for the adapter_khz rate you specified; be conservative.
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@end quotation
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@end deffn
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@ -2470,10 +2470,10 @@ However, it introduces delays to synchronize clocks; so it
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may not be the fastest solution.
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@b{NOTE:} Script writers should consider using @command{jtag_rclk}
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instead of @command{jtag_khz}, but only for (ARM) cores and boards
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instead of @command{adapter_khz}, but only for (ARM) cores and boards
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which support adaptive clocking.
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@deffn {Command} jtag_khz max_speed_kHz
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@deffn {Command} adapter_khz max_speed_kHz
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A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
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JTAG interfaces usually support a limited number of
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speeds. The speed actually used won't be faster
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@ -3881,7 +3881,7 @@ the target clocks are fully set up.)
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before @command{reset_init} is called.
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This is the most robust place to use @command{jtag_rclk}
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or @command{jtag_khz} to switch to a low JTAG clock rate,
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or @command{adapter_khz} to switch to a low JTAG clock rate,
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when reset disables PLLs needed to use a fast clock.
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@ignore
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@item @b{reset-wait-pos}
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@ -7290,7 +7290,7 @@ To set the JTAG frequency use the command:
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@example
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# Example: 1.234MHz
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jtag_khz 1234
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adapter_khz 1234
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@end example
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@ -1556,7 +1556,7 @@ unsigned jtag_get_speed_khz(void)
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return speed_khz;
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}
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static int jtag_khz_to_speed(unsigned khz, int* speed)
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static int adapter_khz_to_speed(unsigned khz, int* speed)
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{
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LOG_DEBUG("convert khz to interface specific speed value");
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speed_khz = khz;
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@ -1576,11 +1576,11 @@ static int jtag_khz_to_speed(unsigned khz, int* speed)
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static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int* speed)
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{
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int retval = jtag_khz_to_speed(0, speed);
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int retval = adapter_khz_to_speed(0, speed);
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if ((ERROR_OK != retval) && fallback_speed_khz)
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{
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LOG_DEBUG("trying fallback speed...");
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retval = jtag_khz_to_speed(fallback_speed_khz, speed);
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retval = adapter_khz_to_speed(fallback_speed_khz, speed);
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}
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return retval;
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}
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@ -1598,7 +1598,7 @@ int jtag_config_khz(unsigned khz)
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LOG_DEBUG("handle jtag khz");
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clock_mode = CLOCK_MODE_KHZ;
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int speed = 0;
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int retval = jtag_khz_to_speed(khz, &speed);
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int retval = adapter_khz_to_speed(khz, &speed);
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return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
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}
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@ -1621,7 +1621,7 @@ int jtag_get_speed(void)
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speed = jtag_speed;
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break;
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case CLOCK_MODE_KHZ:
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jtag_khz_to_speed(jtag_get_speed_khz(), &speed);
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adapter_khz_to_speed(jtag_get_speed_khz(), &speed);
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break;
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case CLOCK_MODE_RCLK:
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jtag_rclk_to_speed(rclk_fallback_speed_khz, &speed);
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@ -680,7 +680,7 @@ static struct bitq_interface presto_bitq = {
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/* -------------------------------------------------------------------------- */
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static int presto_jtag_khz(int khz, int *jtag_speed)
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static int presto_adapter_khz(int khz, int *jtag_speed)
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{
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if (khz < 0)
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{
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@ -797,7 +797,7 @@ struct jtag_interface presto_interface = {
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.execute_queue = bitq_execute_queue,
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.speed = presto_jtag_speed,
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.khz = presto_jtag_khz,
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.khz = presto_adapter_khz,
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.speed_div = presto_jtag_speed_div,
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.init = presto_jtag_init,
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.quit = presto_jtag_quit,
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@ -75,3 +75,12 @@ add_help_text srst_deasserted "Overridable procedure run when srst deassert is d
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proc srst_asserted {} {
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puts "Sensed nSRST asserted."
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}
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# BEGIN MIGRATION AIDS ... these adapter operations originally had
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# JTAG-specific names despite the fact that the operations were not
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# specific to JTAG.
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#
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# FIXME phase these aids out after about April 2011
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#
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proc jtag_khz args { eval adapter_khz $args }
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# END MIGRATION AIDS
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@ -1351,7 +1351,7 @@ COMMAND_HANDLER(handle_jtag_ntrst_assert_width_command)
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return ERROR_OK;
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}
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COMMAND_HANDLER(handle_jtag_khz_command)
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COMMAND_HANDLER(handle_adapter_khz_command)
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{
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if (CMD_ARGC > 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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@ -1608,6 +1608,16 @@ COMMAND_HANDLER(handle_tms_sequence_command)
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}
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static const struct command_registration interface_command_handlers[] = {
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{
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.name = "adapter_khz",
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.handler = handle_adapter_khz_command,
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.mode = COMMAND_ANY,
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.help = "With an argument, change to the specified maximum "
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"jtag speed. For JTAG, 0 KHz signifies adaptive "
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" clocking. "
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"With or without argument, display current setting.",
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.usage = "[khz]",
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},
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{
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.name = "interface",
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.handler = handle_interface_command,
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@ -1636,15 +1646,6 @@ int interface_register_commands(struct command_context *ctx)
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}
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static const struct command_registration jtag_command_handlers[] = {
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{
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.name = "jtag_khz",
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.handler = handle_jtag_khz_command,
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.mode = COMMAND_ANY,
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.help = "With an argument, change to the specified maximum "
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"jtag speed. Pass 0 to require adaptive clocking. "
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"With or without argument, display current setting.",
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.usage = "[khz]",
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},
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{
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.name = "jtag_rclk",
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.handler = handle_jtag_rclk_command,
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@ -880,7 +880,7 @@ static int svf_run_command(struct command_context *cmd_ctx, char *cmd_str)
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// TODO: set jtag speed to
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if (svf_para.frequency > 0)
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{
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command_run_linef(cmd_ctx, "jtag_khz %d", (int)svf_para.frequency / 1000);
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command_run_linef(cmd_ctx, "adapter_khz %d", (int)svf_para.frequency / 1000);
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LOG_DEBUG("\tfrequency = %f", svf_para.frequency);
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}
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}
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@ -65,4 +65,4 @@ $_TARGETNAME configure -event reset-init {
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}
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# This target is pretty snappy...
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jtag_khz 16000
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adapter_khz 16000
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@ -15,7 +15,7 @@ flash_bank cfi 0x10000000 0x00200000 2 2 0
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proc at91rm9200_dk_init { } {
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# Try to run at 1khz... Yea, that slow!
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# Chip is really running @ 32khz
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jtag_khz 8
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adapter_khz 8
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mww 0xfffffc64 0xffffffff
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## disable all clocks but system clock
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@ -41,7 +41,7 @@ proc at91rm9200_dk_init { } {
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#========================================
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# CPU now runs at 180mhz
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# SYS runs at 60mhz.
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jtag_khz 40000
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adapter_khz 40000
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#========================================
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@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
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# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
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# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
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jtag_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
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adapter_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
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halt # Make sure processor is halted, or error will result in following steps.
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mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
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mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
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@ -112,7 +112,7 @@ proc at91sam9g20_init { } {
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# Switch over to adaptive clocking.
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jtag_khz 0
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adapter_khz 0
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# Enable faster DCC downloads.
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@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {
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proc csb337_clk_init { } {
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# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
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jtag_khz 8
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adapter_khz 8
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# CKGR_MOR: start main oscillator (3.6864 MHz)
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mww 0xfffffc20 0xff01
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@ -37,7 +37,7 @@ proc csb337_clk_init { } {
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sleep 20
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# CPU is in Normal Mode ... allows faster JTAG clock speed
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jtag_khz 40000
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adapter_khz 40000
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}
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proc csb337_nor_init { } {
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@ -103,7 +103,7 @@ proc dm365evm_init {} {
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echo "Initialize DM365 EVM board"
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# CLKIN = 24 MHz ... can't talk quickly to ARM yet
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jtag_khz 1500
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adapter_khz 1500
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# FIXME -- PLL init
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@ -4,7 +4,7 @@
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# http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
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# NOTE: to use J-Link instead of the on-board interface,
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# you may also need to reduce jtag_khz to be about 1200.
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# you may also need to reduce adapter_khz to be about 1200.
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# source [find interface/jlink.cfg]
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# include the FT2232 interface config for on-board JTAG interface
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@ -14,7 +14,7 @@ source [find interface/luminary.cfg]
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source [find target/lm3s1968.cfg]
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# jtag speed
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jtag_khz 3000
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adapter_khz 3000
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jtag_nsrst_delay 100
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@ -10,7 +10,7 @@ source [find interface/luminary.cfg]
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source [find target/lm3s811.cfg]
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# jtag speed
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jtag_khz 500
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adapter_khz 500
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jtag_nsrst_delay 100
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@ -9,7 +9,7 @@ source [find interface/luminary-icdi.cfg]
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source [find target/lm3s9b9x.cfg]
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# jtag speed
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jtag_khz 500
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adapter_khz 500
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jtag_nsrst_delay 100
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@ -26,7 +26,7 @@ jtag_ntrst_delay 300
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads enable
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jtag_khz 16000
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adapter_khz 16000
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# Target events
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@ -7,7 +7,7 @@ jtag_ntrst_delay 1
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# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
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# Adaptive clocking through RTCK is not supported.
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jtag_khz 2000
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adapter_khz 2000
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# Target device: LPC29xx with ETB
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# The following variables are used by the LPC2900 script:
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@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
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# Event handlers
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$_TARGETNAME configure -event reset-start {
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# Back to the slow JTAG clock
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jtag_khz 2000
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adapter_khz 2000
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}
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# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
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@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
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mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
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# Increase JTAG speed
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jtag_khz 6000
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adapter_khz 6000
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# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
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mww 0xE0001138 0x0000001F # P1.14 = D0
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@ -5,7 +5,7 @@
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source [find interface/hitex_str9-comstick.cfg]
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# set jtag speed
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jtag_khz 3000
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adapter_khz 3000
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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@ -8,7 +8,7 @@ proc imx27lnst_init { } {
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# This setup puts RAM at 0xA0000000
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# reset the board correctly
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jtag_khz 500
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adapter_khz 500
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reset run
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reset halt
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@ -121,7 +121,7 @@ reset_config trst_and_srst
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# IMPORTANT! See README at top of this file.
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#-------------------------------------------------------------------------
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jtag_khz 12000
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adapter_khz 12000
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jtag interface
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#-------------------------------------------------------------------------
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@ -2,7 +2,7 @@ source [find target/lpc3250.cfg]
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jtag_nsrst_delay 200
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jtag_ntrst_delay 1
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jtag_khz 200
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adapter_khz 200
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reset_config trst_and_srst separate
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arm7_9 dcc_downloads enable
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@ -11,11 +11,11 @@ $_TARGETNAME configure -event gdb-attach { reset init }
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$_TARGETNAME configure -event reset-start {
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arm7_9 fast_memory_access disable
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jtag_khz 200
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adapter_khz 200
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}
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$_TARGETNAME configure -event reset-end {
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jtag_khz 6000
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adapter_khz 6000
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arm7_9 fast_memory_access enable
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}
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|
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@ -26,11 +26,11 @@ reset_config trst_and_srst separate
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# issue telnet: reset init
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# issue gdb: monitor reset init
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$_TARGETNAME configure -event reset-init {
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jtag_khz 100
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adapter_khz 100
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# this will setup Telo board
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setupTelo
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#turn up the JTAG speed
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jtag_khz 3000
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adapter_khz 3000
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puts "JTAG speek now 3MHz"
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puts "type helpC100 to get help on C100"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ proc topas910_init { } {
|
|||
mww 0xf4300004 0x00000000
|
||||
|
||||
sleep 10
|
||||
# jtag_khz NNNN
|
||||
# adapter_khz NNNN
|
||||
|
||||
# remap off in case of IROM boot
|
||||
mww 0xf0000004 0x00000001
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ proc topasa900_init { } {
|
|||
mww 0xf4300004 0x00000000
|
||||
|
||||
sleep 10
|
||||
# jtag_khz NNNN
|
||||
# adapter_khz NNNN
|
||||
|
||||
# remap off in case of IROM boot
|
||||
mww 0xf0000004 0x00000001
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
# other things than flash programming.
|
||||
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
|
||||
|
||||
jtag_khz 16000
|
||||
adapter_khz 16000
|
||||
|
||||
|
||||
proc production_info {} {
|
||||
|
|
|
|||
|
|
@ -8,4 +8,4 @@ interface usb_blaster
|
|||
# These are already the defaults.
|
||||
# usb_blaster_vid_pid 0x09FB 0x6001
|
||||
# usb_blaster_device_desc "USB-Blaster"
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
|
|
|||
|
|
@ -8,5 +8,5 @@ interface ft2232
|
|||
ft2232_device_desc "OOCDLink"
|
||||
ft2232_layout oocdlink
|
||||
ft2232_vid_pid 0x0403 0xbaf8
|
||||
jtag_khz 5
|
||||
adapter_khz 5
|
||||
|
||||
|
|
|
|||
|
|
@ -8,5 +8,5 @@ interface ft2232
|
|||
ft2232_layout sheevaplug
|
||||
ft2232_vid_pid 0x0403 0x9e90
|
||||
ft2232_device_desc "OpenRD JTAGKey FT2232D B"
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
||||
|
|
|
|||
|
|
@ -8,5 +8,5 @@ interface ft2232
|
|||
ft2232_layout sheevaplug
|
||||
ft2232_vid_pid 0x9e88 0x9e8f
|
||||
ft2232_device_desc "SheevaPlug JTAGKey FT2232D B"
|
||||
jtag_khz 2000
|
||||
adapter_khz 2000
|
||||
|
||||
|
|
|
|||
|
|
@ -7,5 +7,5 @@
|
|||
interface usb_blaster
|
||||
usb_blaster_vid_pid 0x16C0 0x06AD
|
||||
usb_blaster_device_desc "USB-JTAG-IF"
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ vsllink_usb_bulkout 0x03
|
|||
vsllink_usb_interface 1
|
||||
|
||||
# vsllink mode, dma or normal
|
||||
# for low jtag_khz, use normal
|
||||
# for high jtag_khz, use dma
|
||||
# for low adapter_khz, use normal
|
||||
# for high adapter_khz, use dma
|
||||
#vsllink_mode dma
|
||||
vsllink_mode normal
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
|
||||
|
||||
|
||||
jtag_khz 4
|
||||
adapter_khz 4
|
||||
|
||||
|
||||
######################################
|
||||
|
|
@ -62,7 +62,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
|
|||
proc at91sam_init { } {
|
||||
|
||||
# at reset chip runs at 32khz
|
||||
jtag_khz 8
|
||||
adapter_khz 8
|
||||
halt
|
||||
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
|
||||
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
|
||||
|
|
@ -79,7 +79,7 @@ proc at91sam_init { } {
|
|||
sleep 10 # wait 10 ms
|
||||
|
||||
# Now run at anything fast... ie: 10mhz!
|
||||
jtag_khz 10000 # Increase JTAG Speed to 6 MHz
|
||||
adapter_khz 10000 # Increase JTAG Speed to 6 MHz
|
||||
arm7_9 dcc_downloads enable # Enable faster DCC downloads
|
||||
|
||||
mww 0xffffec00 0x0a0a0a0a # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
# this script only configures one core (that is used to run Linux)
|
||||
|
||||
# assume no PLL lock, start slowly
|
||||
jtag_khz 100
|
||||
adapter_khz 100
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
|
|
|
|||
|
|
@ -504,7 +504,7 @@ proc reboot {} {
|
|||
mww $TIMER_WDT_HIGH_BOUND 0xffffff
|
||||
mww $TIMER_WDT_CURRENT_COUNT 0x0
|
||||
puts "JTAG speed lowered to 100kHz"
|
||||
jtag_khz 100
|
||||
adapter_khz 100
|
||||
mww $TIMER_WDT_CONTROL 0x1
|
||||
# wait until the reset
|
||||
puts -nonewline "Wating for watchdog to trigger..."
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
|
|||
}
|
||||
|
||||
#jtag speed
|
||||
jtag_khz 4500
|
||||
adapter_khz 4500
|
||||
|
||||
#has only srst
|
||||
reset_config srst_only
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ if { [info exists CPUTAPID ] } {
|
|||
}
|
||||
|
||||
# jtag speed
|
||||
jtag_khz 500
|
||||
adapter_khz 500
|
||||
|
||||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
|
|||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
||||
jtag_khz 1000
|
||||
adapter_khz 1000
|
||||
|
||||
#jtag scan chain
|
||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||
|
|
|
|||
|
|
@ -47,4 +47,4 @@ set _FLASHNAME $_CHIPNAME.flash
|
|||
flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
|
||||
|
||||
# 4MHz / 6 = 666kHz, so use 500
|
||||
jtag_khz 500
|
||||
adapter_khz 500
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ jtag_ntrst_delay 200
|
|||
|
||||
# rclk hasn't been working well. This maybe the mc13224v or something else.
|
||||
#jtag_rclk 2000
|
||||
jtag_khz 2000
|
||||
adapter_khz 2000
|
||||
|
||||
######################
|
||||
# Target configuration
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
set _ENDIAN little
|
||||
|
||||
# jtag speed
|
||||
jtag_khz 4500
|
||||
adapter_khz 4500
|
||||
|
||||
reset_config srst_only
|
||||
jtag_nsrst_delay 100
|
||||
|
|
@ -27,7 +27,7 @@ flash bank $_FLASHNAME avr 0 0 0 0 $_TARGETNAME
|
|||
|
||||
#to use it, script will be like:
|
||||
#init
|
||||
#jtag_khz 4500
|
||||
#adapter_khz 4500
|
||||
#reset init
|
||||
#verify_ircapture disable
|
||||
#
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@ target create $_TARGETNAME xscale -endian $_ENDIAN \
|
|||
# PXA255 comes out of reset using 3.6864 MHz oscillator.
|
||||
# Until the PLL kicks in, keep the JTAG clock slow enough
|
||||
# that we get no errors.
|
||||
jtag_khz 300
|
||||
$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }
|
||||
adapter_khz 300
|
||||
$_TARGETNAME configure -event "reset-start" { adapter_khz 300 }
|
||||
|
||||
# both TRST and SRST are *required* for debug
|
||||
# DCSR is often accessed with SRST active
|
||||
|
|
|
|||
|
|
@ -26,12 +26,12 @@ assumed that all write-protect mechanisms should be disabled.
|
|||
flash write_image [file] <parameters>
|
||||
verify_image [file] <parameters>
|
||||
|
||||
4. jtag_khz sets the maximum speed (or alternatively RCLK). If invoked
|
||||
4. adapter_khz sets the maximum speed (or alternatively RCLK). If invoked
|
||||
multiple times only the last setting is used.
|
||||
|
||||
interface/xxx.cfg files are always executed *before* target/xxx.cfg
|
||||
files, so any jtag_khz in interface/xxx.cfg will be overridden by
|
||||
target/xxx.cfg. jtag_khz in interface/xxx.cfg would then, effectively,
|
||||
files, so any adapter_khz in interface/xxx.cfg will be overridden by
|
||||
target/xxx.cfg. adapter_khz in interface/xxx.cfg would then, effectively,
|
||||
set the default JTAG speed.
|
||||
|
||||
Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
|
||||
|
|
|
|||
|
|
@ -7,11 +7,11 @@
|
|||
#
|
||||
# RCLK?
|
||||
#
|
||||
# jtag_khz 0
|
||||
# adapter_khz 0
|
||||
#
|
||||
# Really low clock during reset?
|
||||
#
|
||||
# jtag_khz 1
|
||||
# adapter_khz 1
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
|
|||
# NOTE: this may be increased by a reset-init handler, after it
|
||||
# configures and enables the PLL. Or you might need to decrease
|
||||
# this, if you're using a slower clock.
|
||||
jtag_khz 500
|
||||
$_TARGETNAME configure -event reset-start {jtag_khz 500}
|
||||
adapter_khz 500
|
||||
$_TARGETNAME configure -event reset-start {adapter_khz 500}
|
||||
|
||||
# flash configuration ... autodetects sizes, autoprobed
|
||||
flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ if { [info exists WORKAREASIZE] } {
|
|||
}
|
||||
|
||||
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
||||
jtag_khz 1000
|
||||
adapter_khz 1000
|
||||
|
||||
jtag_nsrst_delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
#start slow, speed up after reset
|
||||
jtag_khz 10
|
||||
adapter_khz 10
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
|
|
@ -29,9 +29,9 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_C
|
|||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
|
||||
|
||||
$_TARGETNAME configure -event reset-start { jtag_khz 10 }
|
||||
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
jtag_khz 6000
|
||||
adapter_khz 6000
|
||||
|
||||
# Because the hardware cannot be interrogated for the protection state
|
||||
# of sectors, initialize all the sectors to be unprotected. The initial
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
#STR730 CPU
|
||||
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
|
|
@ -33,9 +33,9 @@ jtag_ntrst_delay 500
|
|||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
|
||||
|
||||
$_TARGETNAME configure -event reset-start { jtag_khz 10 }
|
||||
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
||||
# Because the hardware cannot be interrogated for the protection state
|
||||
# of sectors, initialize all the sectors to be unprotected. The initial
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ if { [info exists CPUTAPID] } {
|
|||
}
|
||||
|
||||
# jtag speed
|
||||
jtag_khz 10
|
||||
adapter_khz 10
|
||||
|
||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
|
@ -35,9 +35,9 @@ jtag_ntrst_delay 500
|
|||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
|
||||
|
||||
$_TARGETNAME configure -event reset-start { jtag_khz 10 }
|
||||
$_TARGETNAME configure -event reset-start { adapter_khz 10 }
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
jtag_khz 3000
|
||||
adapter_khz 3000
|
||||
|
||||
# Because the hardware cannot be interrogated for the protection state
|
||||
# of sectors, initialize all the sectors to be unprotected. The initial
|
||||
|
|
|
|||
|
|
@ -26,12 +26,12 @@ reset_config trst_and_srst separate
|
|||
# issue telnet: reset init
|
||||
# issue gdb: monitor reset init
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
jtag_khz 100
|
||||
adapter_khz 100
|
||||
# this will setup Telo board
|
||||
setupTelo
|
||||
#turn up the JTAG speed
|
||||
jtag_khz 3000
|
||||
puts "JTAG speek now 3MHz"
|
||||
adapter_khz 3000
|
||||
puts "JTAG speed now 3MHz"
|
||||
puts "type helpC100 to get help on C100"
|
||||
}
|
||||
|
||||
|
|
@ -58,4 +58,4 @@ set _FLASHNAME $_CHIPNAME.flash
|
|||
flash bank $_FLASHNAME cfi 0x20000000 0x01000000 2 2 $_TARGETNAME
|
||||
|
||||
# writing data to memory does not work without this
|
||||
memwrite burst disable
|
||||
memwrite burst disable
|
||||
|
|
|
|||
Loading…
Reference in New Issue