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yosys
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236 Commits

Author SHA1 Message Date
Miodrag Milanovic 6d5adb6a65 Update documentation 2022-09-06 08:08:41 +02:00
Jannis Harder c0063288d6 Add the $anyinit cell and the formalff pass 
These can be used to protect undefined flip-flop initialization values
from optimizations that are not sound for formal verification and can
help mapping all solver-provided values in witness traces for flows that
use different backends simultaneously.
 2022-08-16 13:37:30 +02:00
Miodrag Milanovic 3f7042d114 update manual to latest 2022-08-03 13:44:13 +02:00
Miodrag Milanovic 6a1d98b816 Update manual and changelog 2022-08-03 10:30:58 +02:00
Miodrag Milanovic 6f792e2223 Update documentation 2022-08-01 12:34:51 +02:00
Miodrag Milanovic 59b96bb1f8 Upadte documentation and changelog 2022-07-04 11:09:06 +02:00
Jacob Lifshay c16c028831 add hierarchy -smtcheck 
like -simcheck, but allow smtlib2_module modules.
 2022-06-22 20:53:10 -07:00
Miodrag Milanovic d1cd24a457 Update manual 2022-06-10 15:00:07 +02:00
Miodrag Milanovic 096f3d2aa4 Update changelog and manual 2022-06-08 11:28:06 +02:00
Miodrag Milanovic 65f70b9d50 Update manual 2022-05-09 09:53:01 +02:00
Miodrag Milanovic 0d3bf9e725 Update CHANGELOG and manual 2022-04-04 16:53:47 +02:00
Miodrag Milanovic a7090e9711 Update documentation 2022-03-04 10:56:33 +01:00
Miodrag Milanovic 9647f6326f Update CHANGELOG and manual 2022-02-07 17:07:48 +01:00
Marcelina Kościelnicka 0e97c3fd74 manual: Fix a custom pass example. 
Fixes #3156.
 2022-01-27 23:27:45 +01:00
gatecat 493b5e03e7 manual: Fix cell-stmt order 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-01-03 18:17:10 -07:00
Miodrag Milanovic cb17eeaf50 Update manual 2022-01-03 11:57:11 +01:00
Marcelina Kościelnicka 1184a7f3b4 opt_mem_priority: Fix non-ascii char in help message. 
This is a fixed version of #3072.
 2021-12-09 00:56:14 +01:00
Miodrag Milanovic 71e762d68c Update manual 2021-12-03 09:57:14 +01:00
Gabriel Somlo 9a413803eb manual: fix pdflatex inputenc undefined char error 
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
 2021-11-07 03:05:03 +01:00
Miodrag Milanovic 598f51c6a1 Update command reference 2021-11-05 10:04:15 +01:00
Miodrag Milanovic 55f07fe56f Update command reference part of manual 2021-10-29 13:10:50 +02:00
Marcelina Kościelnicka ec2b5548fe Add $aldff and $aldffe: flip-flops with async load. 2021-10-02 18:12:52 +02:00
Marcelina Kościelnicka fd79217763 Add v2 memory cells. 2021-08-11 13:34:10 +02:00
Marcelina Kościelnicka 19720b970d memory: Introduce $meminit_v2 cell, with EN input. 2021-07-28 23:18:38 +02:00
Claire Xenia Wolf 2d95a7da9c Intersynth URL 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2021-06-09 12:42:52 +02:00
Claire Xenia Wolf a734face3a More deadname stuff 2021-06-09 12:33:41 +02:00
Claire Xenia Wolf 0ada13cbe2 Use HTTPS for website links, gatecat email 
git ls-tree -r --name-only HEAD | xargs sed -i -rf ~/fixemails.sed

s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+(Shah|gatecat)\s+<(dave|david|gatecat)@(symbioticeda.com|yosyshq.com|ds0.me)>/gatecat <gatecat@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/|http://yosyshq.net/yosys/,https://yosyshq.net/yosys/,g;
 2021-06-09 12:16:56 +02:00
Claire Xenia Wolf 72787f52fc Fixing old e-mail addresses and deadnames 
s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g;
 2021-06-08 00:39:36 +02:00
N. Engelhardt d9ec35a526 split CodingReadme into multiple files 2021-03-22 19:16:25 +01:00
Zachary Snow c8b45a4a82 bugpoint: add runner option 2021-03-17 15:54:00 -04:00
Marcelina Kościelnicka 89c74ffd71 verilog: Use proc memory writes in the frontend. 2021-03-08 20:16:29 +01:00
Marcelina Kościelnicka 4e03865d5b Add support for memory writes in processes. 2021-03-08 20:16:29 +01:00
Claire Xen 7d2097b005
Update command-reference-manual.tex 2021-03-04 16:45:21 +01:00
Robert Baruch ca4b1afcb6 RTLIL Documentation: switch in process is optional 2021-02-27 09:58:03 -08:00
Robert Baruch 2bb3fc654a Further juggles the wording of "character". 2020-11-25 12:02:35 -08:00
Robert Baruch 5d1bb79895 Clarifies how character encodings work. 2020-11-25 11:57:17 -08:00
Robert Baruch 1faf0e6dcc Clarifies whitespace and eol. 2020-11-25 10:06:22 -08:00
Robert Baruch 5615c41907 Cleans up doublequotes 2020-11-25 09:58:36 -08:00
Robert Baruch 09f6e9d6b6 Clarifies use of integers, and character set. 2020-11-25 09:53:39 -08:00
Robert Baruch 39af3e629f Clarifies processes, corrects some attributes 2020-11-25 08:59:25 -08:00
Robert Baruch be938b3094 Refactors for attributes. 2020-11-24 21:59:53 -08:00
Robert Baruch 278b542273 Cleans up some descriptions and syntax 
Now all rules ending in "-stmt" end in eol.
 2020-11-24 15:27:30 -08:00
Robert Baruch d3d28e287f Adds missing "end" and eol to module. 2020-11-22 21:08:58 -08:00
Robert Baruch c5a2ae01cd Update to Values #2 2020-11-22 18:50:41 -08:00
Robert Baruch 5159dda826 Update to Values section 2020-11-22 18:48:21 -08:00
Robert Baruch 1034422c58 Adds appendix on RTLIL text format 2020-11-22 12:56:29 -08:00
whitequark eae88df016 manual: fix typo. 2020-08-27 16:34:48 +00:00
whitequark 00e7dec7f5 Replace "ILANG" with "RTLIL" everywhere. 
The only difference between "RTLIL" and "ILANG" is that the latter is
the text representation of the former, as opposed to the in-memory
graph representation. This distinction serves no purpose but confuses
people: it is not obvious that the ILANG backend writes RTLIL graphs.

Passes `write_ilang` and `read_ilang` are provided as aliases to
`write_rtlil` and `read_rtlil` for compatibility.
 2020-08-26 17:29:32 +00:00
Marcelina Kościelnicka 2db270cbc7 Add latches to the manual. 2020-06-26 23:27:14 +02:00
Marcelina Kościelnicka 80a0cf9bb8 Add a few more gate types to the manual. 2020-06-26 23:27:14 +02:00