e6f3d1c225
kernel/mem: Introduce transparency masks.
2021-08-11 00:04:16 +02:00
d25b9088c8
Refactor common parts of SAT-using optimizations into a helper.
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This also aligns the functionality:
- in all cases, the onehot attribute is used to create appropriate
constraints (previously, opt_dff didn't do it at all, and share
created one-hot constraints based on $pmux presence alone, which
is unsound)
- in all cases, shift and mul/div/pow cells are now skipped when
importing the SAT problem (previously only memory_share did this)
— this avoids creating clauses for hard cells that are unlikely
to help with proving the UNSATness needed for optimization
2021-08-09 16:54:35 +02:00
98003430d6
opt_merge: Use FfInitVals.
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Partial #2920 fix.
2021-08-08 01:19:22 +02:00
54e75129e5
opt_lut: Allow more than one -dlogic per cell type.
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Fixes #2061 .
2021-07-29 17:30:07 +02:00
19720b970d
memory: Introduce $meminit_v2 cell, with EN input.
2021-07-28 23:18:38 +02:00
436d42c00c
opt_expr: Propagate constants to port connections.
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This adds one simple piece of functionality to opt_expr: when a cell
port is connected to a fully-constant signal (as determined by sigmap),
the port is reconnected directly to the constant value. This is just
enough optimization to fix the "non-constant $meminit input" problem
without requiring a full opt_clean or a separate pass.
2021-07-27 20:44:26 +02:00
6a6d049f1c
opt_muxtree: Update port_off and port_idx even for constant bits
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Signed-off-by: gatecat <gatecat@ds0.me>
2021-06-11 12:06:35 +01:00
1667ad658b
opt_expr: Fix mul/div/mod by POT patterns to support >= 32 bits.
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The previous code, in addition to being needlessly limitted to 32 bits
in the first place, also had UB for the 31th bit (doing 1 << 31).
2021-06-09 19:53:44 +02:00
12b3a9765d
opt_expr: Optimize div/mod by const 1.
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Turns out the code for div by a power of 2 is already almost capable of
optimizing this to a shift-by-0 or and-with-0, which will be further
folded into nothingness; let's beef it up to handle div by 1 as well.
Fixes #2820 .
2021-06-09 17:42:30 +02:00
72787f52fc
Fixing old e-mail addresses and deadnames
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s/((Claire|Xen|Xenia|Clifford)\s+)+(Wolf|Xen)\s+<(claire|clifford)@(symbioticeda.com|clifford.at|yosyshq.com)>/Claire Xenia Wolf <claire@yosyshq.com>/gi;
s/((Nina|Nak|N\.)\s+)+Engelhardt\s+<nak@(symbioticeda.com|yosyshq.com)>/N. Engelhardt <nak@yosyshq.com>/gi;
s/((David)\s+)+Shah\s+<(dave|david)@(symbioticeda.com|yosyshq.com|ds0.me)>/David Shah <dave@ds0.me>/gi;
s/((Miodrag)\s+)+Milanovic\s+<(miodrag|micko)@(symbioticeda.com|yosyshq.com)>/Miodrag Milanovic <micko@yosyshq.com>/gi;
s,https?://www.clifford.at/yosys/,http://yosyshq.net/yosys/,g ;
2021-06-08 00:39:36 +02:00
83a218141c
kernel/mem: Add sub_addr helpers.
2021-05-26 03:34:02 +02:00
e6b078d156
opt_mem: Add reset/init value support.
2021-05-25 20:06:00 +02:00
5628f5a88f
opt_mem_feedback: Respect write port priority.
2021-05-25 15:59:41 +02:00
9d5d5a48b1
opt_mem_feedback: Add wide port support.
2021-05-25 02:57:32 +02:00
835688bf80
opt_mem_feedback: Rewrite feedback path finding logic.
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Fixes #2766 .
2021-05-24 23:20:30 +02:00
b706adb809
opt_mem_feedback: Convert to Mem helpers.
2021-05-24 23:20:30 +02:00
d905990d01
memory_share: Split off feedback path finding as a separate pass.
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memory_share is actually three passes in a trenchcoat. Split off the
one that has the least in common with the other two as a separate pass.
2021-05-23 18:30:39 +02:00
a23d9409e7
opt_mem: Remove write ports with const-0 EN.
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Fixes #2765 .
2021-05-23 14:30:56 +02:00
5c1e6a0e20
opt_dff: Fix NOT gates wired in reverse.
2021-05-04 21:03:40 +02:00
3af871f969
opt_clean: Remove init attribute bits together with removed DFFs.
...
Fixes #2546 .
2021-03-15 17:16:53 +01:00
01626e6746
opt_share: Fix X and CO signal width for shifted $alu in opt_share.
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These need to be the same length as actual Y, not visible part of Y.
Fixes #2538 .
2021-01-14 14:54:08 +01:00
9396678db4
Fix use-after-free in LUT opt pass
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RTLIL::Module::remove(Cell* cell) calls `delete cell`.
Any subsequent accesses of `cell` then causes undefined behavior.
2020-12-22 03:23:42 +01:00
06141db233
opt_mem: Use Mem helpers.
2020-10-21 17:51:20 +02:00
7670a89e1f
opt_clean: Better memory handling.
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Previously, `$memwr` and `$meminit` cells were always preserved (along
with the memory itself). With this change, they are instead part of the
main cell mark-and-sweep pass: a memory (and its `$meminit` and `$memwr`
cells) is only preserved iff any associated `$memrd` cell needs to be
preserved.
2020-10-08 18:05:51 +02:00
3238190797
use the new isPublic() in a few places
2020-09-14 12:43:18 +02:00
a96df40814
Merge pull request #2344 from YosysHQ/mwk/opt_share-fixes
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opt_share: Refactor, fix some bugs.
2020-08-20 16:24:53 +02:00
1d0d9d5c86
Merge pull request #2337 from YosysHQ/mwk/clean-keep-wire
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opt_clean: Fix module keep rules.
2020-08-20 16:23:55 +02:00
2b777bbda8
opt_share: Refactor, fix some bugs.
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Fixes #2334 .
Fixes #2335 .
Fixes #2336 .
2020-08-17 17:26:36 +02:00
2ab350a7b0
opt_clean: Fix module keep rules.
...
- wires with keep attribute now force a module to be kept
- presence of $memwr and $meminit cells no longer forces a module to be
kept
2020-08-09 13:57:00 +02:00
acd8c5c205
Remove now-redundant opt_rmdff pass.
2020-08-07 13:21:34 +02:00
9a4f420b4b
Replace opt_rmdff with opt_dff.
2020-08-07 13:21:03 +02:00
6cd135a5eb
opt_expr: Remove -clkinv option, make it the default.
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Adds -noclkinv option just in case the old behavior was actually useful
to someone.
2020-07-31 00:08:15 +02:00
af6623ebb8
Add opt_dff pass.
2020-07-30 18:27:04 +02:00
dc18bf1969
opt_expr: Fix handling of $_XNOR_ cells with A = B.
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Fixes #2311 .
2020-07-29 12:41:43 +02:00
31d6107521
pmux2shift: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
4d9105ccb0
wreduce: Refactor to use FfInitVals.
2020-07-24 11:22:31 +02:00
61a7ec4768
opt_merge: Dedup one more use of FF cell type list.
2020-07-15 06:19:18 +02:00
7afcb72c98
opt_expr: Fix crash on $mul optimization with more zeros removed than Y has.
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Fixes #2221 .
2020-07-05 06:31:58 +02:00
77b15dd8e9
opt_merge: use the master FF type list
2020-06-30 20:57:35 +02:00
c7d71f436d
Merge pull request #2168 from whitequark/assert-unused-exprs
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Use (and ignore) the expression provided to log_assert in NDEBUG builds
2020-06-25 18:21:51 +02:00
119f79d8b9
Add support for new FF types in some opt passes.
2020-06-23 15:40:02 +02:00
118e4caa37
Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().
2020-06-19 15:48:58 +00:00
7191dd16f9
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
3c7122c378
Do not optimize away FFs in "prep" and Verific fron-end
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Signed-off-by: Claire Wolf <claire@symbioticeda.com>
2020-06-09 15:54:14 +02:00
edd8ff2c07
Add flooring division operator
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The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $divfloor cell provides this flooring division.
This commit also fixes the handling of $div in opt_expr, which was
previously optimized as if it was $divfloor.
2020-05-28 22:59:04 +02:00
17163cf43a
Add flooring modulo operator
...
The $div and $mod cells use truncating division semantics (rounding
towards 0), as defined by e.g. Verilog. Another rounding mode, flooring
(rounding towards negative infinity), can be used in e.g. VHDL. The
new $modfloor cell provides this flooring modulo (also known as "remainder"
in several languages, but this name is ambiguous).
This commit also fixes the handling of $mod in opt_expr, which was
previously optimized as if it was $modfloor.
2020-05-28 22:59:03 +02:00
7b3a4a1fff
opt_expr: Sx to Sz; spotted by @Xiretza
2020-05-14 12:14:23 -07:00
73b7ea713c
Merge pull request #1994 from YosysHQ/eddie/fix_bug1758
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opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too
2020-05-14 11:56:22 -07:00
cd92a706ae
Fix whitespace
2020-05-14 09:51:17 -07:00
5be4b00a0d
opt_clean: improve warning message
2020-05-14 00:59:38 -07:00
Marcelina Kościelnicka
gatecat
Claire Xenia Wolf
StefanBruens
N. Engelhardt
clairexen
whitequark
Xiretza
Eddie Hung