github-actions[bot]
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23d062fea3
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Bump version
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2022-02-08 00:59:03 +00:00 |
Miodrag Milanovic
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818060880d
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Next dev cycle
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2022-02-07 17:10:50 +01:00 |
Miodrag Milanovic
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a4522d6282
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Release version 0.14
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2022-02-07 17:08:39 +01:00 |
Miodrag Milanovic
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9647f6326f
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Update CHANGELOG and manual
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2022-02-07 17:07:48 +01:00 |
Miodrag Milanović
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d7f7227ce8
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Merge pull request #3185 from YosysHQ/micko/co_sim
Add co-simulation in sim pass
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2022-02-07 16:36:43 +01:00 |
github-actions[bot]
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9c93668954
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Bump version
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2022-02-07 00:56:31 +00:00 |
Marcelina Kościelnicka
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958c3a46ad
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nexus: Fix arith_map CO signal.
Fixes #3187.
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2022-02-06 13:05:30 +01:00 |
Miodrag Milanovic
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c0a156bcb4
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Error detection for co-simulation
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2022-02-04 11:11:36 +01:00 |
Miodrag Milanovic
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6db23de7b1
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bug fix and cleanups
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2022-02-04 10:01:06 +01:00 |
github-actions[bot]
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675a7bd22c
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Bump version
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2022-02-03 00:54:22 +00:00 |
Miodrag Milanović
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2d98fe870c
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Merge pull request #3183 from YosysHQ/micko/nto1mux
Use bmux for NTO1MUX
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2022-02-02 16:22:53 +01:00 |
Miodrag Milanovic
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0b633b6c2e
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Use bmux for NTO1MUX
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2022-02-02 16:16:08 +01:00 |
Miodrag Milanovic
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7ef6da4c7d
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Add test cases for co-simulation
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2022-02-02 13:22:44 +01:00 |
Miodrag Milanović
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518521c72e
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Merge pull request #3182 from yrabbit/wip-doc2
Correct a typo in the manual
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2022-02-02 12:19:17 +01:00 |
YRabbit
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f5609d52c4
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Correct a typo in the manual
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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2022-02-02 21:14:38 +10:00 |
Miodrag Milanovic
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4a30c9cb94
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Fix Visual Studio build
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2022-02-02 11:46:06 +01:00 |
Miodrag Milanovic
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990aee5531
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respect hide_internal flag
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2022-02-02 10:15:22 +01:00 |
Miodrag Milanovic
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169ffcd2fb
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unify cycles counting and cleanup
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2022-02-02 10:08:23 +01:00 |
Miodrag Milanovic
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820b2fdd65
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added stimulus mode and param check
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2022-02-02 09:37:32 +01:00 |
Scott Thibault
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0a6e2bd5d5
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Update comment
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2022-02-02 03:21:09 +01:00 |
Scott Thibault
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e04ac4e9e9
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Fix unextend method for signed constants
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2022-02-02 03:21:09 +01:00 |
Miodrag Milanovic
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8ba2000a50
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error when no signal found
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2022-01-31 17:41:50 +01:00 |
Miodrag Milanović
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bf85dfee5e
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Merge pull request #3176 from higuoxing/fix-ref-manual
Fix the help message of synth_quicklogic command.
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2022-01-31 16:11:00 +01:00 |
Miodrag Milanovic
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1b5ff92e62
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Cleanup
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2022-01-31 13:45:28 +01:00 |
Miodrag Milanovic
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eabd0ff115
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Compare bits when not all are defined
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2022-01-31 13:41:02 +01:00 |
Miodrag Milanovic
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26de52fa09
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Cleanup
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2022-01-31 12:00:15 +01:00 |
Miodrag Milanovic
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6513300db7
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message update
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2022-01-31 11:41:52 +01:00 |
Miodrag Milanovic
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543feb75cb
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Display simulation time data
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2022-01-31 10:52:47 +01:00 |
Miodrag Milanovic
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a6959d30df
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Use edges when explicit
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2022-01-31 09:38:25 +01:00 |
Miodrag Milanovic
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cbadfa0268
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Updating initial state and checks
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2022-01-31 09:19:34 +01:00 |
Miodrag Milanovic
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190e44f0da
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Fix scope
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2022-01-31 08:56:29 +01:00 |
github-actions[bot]
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fc40df0916
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Bump version
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2022-01-31 00:54:31 +00:00 |
Marcelina Kościelnicka
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56e7791760
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verilog backend: Emit a `wire` for ports as well.
Fixes #3177.
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2022-01-31 01:08:41 +01:00 |
Xing GUO
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0520e99968
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Fix the help message of synth_quicklogic.
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2022-01-31 02:23:59 +08:00 |
Marcelina Kościelnicka
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07a657fb0c
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opt_reduce: Add $bmux and $demux optimization patterns.
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2022-01-30 03:37:52 +01:00 |
github-actions[bot]
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772d137bfa
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Bump version
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2022-01-29 02:48:50 +00:00 |
Marcelina Kościelnicka
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93508d58da
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Add $bmux and $demux cells.
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2022-01-28 23:34:41 +01:00 |
Miodrag Milanovic
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f04d1398e5
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check if stop before start
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2022-01-28 19:41:43 +01:00 |
Miodrag Milanovic
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ecbba625c4
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set initial state, only flip-flops
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2022-01-28 15:59:13 +01:00 |
Miodrag Milanovic
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cb12b7c4d8
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ignore not found private signals
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2022-01-28 14:20:16 +01:00 |
Miodrag Milanovic
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f0f3c81c56
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preserve VCD mangled names
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2022-01-28 14:10:39 +01:00 |
Miodrag Milanovic
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72acce0c82
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detect edges even when x
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2022-01-28 13:53:27 +01:00 |
Miodrag Milanovic
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81b76155d6
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recursive check
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2022-01-28 13:24:38 +01:00 |
Miodrag Milanovic
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a8d03df173
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cleanup
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2022-01-28 12:54:16 +01:00 |
Miodrag Milanovic
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4f75a2ca1b
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Do actual compare
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2022-01-28 12:50:41 +01:00 |
Miodrag Milanovic
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7101df62f8
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Fix for limit_range_end when not writing vcd
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2022-01-28 12:15:14 +01:00 |
Miodrag Milanovic
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3e35de2be1
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Add more options and time handling
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2022-01-28 10:18:02 +01:00 |
Marcelina Kościelnicka
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db33b1e535
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opt_dff: Don't mutate muxes while ModWalker is active.
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2022-01-28 08:55:56 +01:00 |
Marcelina Kościelnicka
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bac750fb99
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kernel/mem: Add read-first semantic emulation code.
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2022-01-28 08:48:33 +01:00 |
github-actions[bot]
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9a2294f285
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Bump version
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2022-01-28 02:39:40 +00:00 |