mirror of https://github.com/YosysHQ/yosys.git
opt_dff: Don't mutate muxes while ModWalker is active.
This commit is contained in:
Marcelina Kościelnicka
parent
bac750fb99
commit
db33b1e535
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@ -58,13 +58,10 @@ struct OptDffWorker
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typedef std::pair<RTLIL::SigBit, bool> ctrl_t;
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typedef std::set<ctrl_t> ctrls_t;
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ModWalker modwalker;
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QuickConeSat qcsat;
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// Used as a queue.
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std::vector<Cell *> dff_cells;
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OptDffWorker(const OptDffOptions &opt, Module *mod) : opt(opt), module(mod), sigmap(mod), initvals(&sigmap, mod), modwalker(module->design, module), qcsat(modwalker) {
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OptDffWorker(const OptDffOptions &opt, Module *mod) : opt(opt), module(mod), sigmap(mod), initvals(&sigmap, mod) {
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// Gathering two kinds of information here for every sigmapped SigBit:
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//
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// - bitusers: how many users it has (muxes will only be merged into FFs if this is 1, making the FF the only user)
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@ -569,100 +566,6 @@ struct OptDffWorker
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changed = true;
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}
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// Now check if any bit can be replaced by a constant.
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pool<int> removed_sigbits;
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for (int i = 0; i < ff.width; i++) {
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State val = ff.val_init[i];
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if (ff.has_arst)
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val = combine_const(val, ff.val_arst[i]);
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if (ff.has_srst)
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val = combine_const(val, ff.val_srst[i]);
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if (ff.has_sr) {
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if (ff.sig_clr[i] != (ff.pol_clr ? State::S0 : State::S1))
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val = combine_const(val, State::S0);
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if (ff.sig_set[i] != (ff.pol_set ? State::S0 : State::S1))
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val = combine_const(val, State::S1);
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}
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if (val == State::Sm)
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continue;
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if (ff.has_clk || ff.has_gclk) {
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if (!ff.sig_d[i].wire) {
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val = combine_const(val, ff.sig_d[i].data);
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if (val == State::Sm)
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continue;
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} else {
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if (!opt.sat)
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continue;
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// For each register bit, try to prove that it cannot change from the initial value. If so, remove it
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if (!modwalker.has_drivers(ff.sig_d.extract(i)))
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continue;
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if (val != State::S0 && val != State::S1)
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continue;
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int init_sat_pi = qcsat.importSigBit(val);
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int q_sat_pi = qcsat.importSigBit(ff.sig_q[i]);
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int d_sat_pi = qcsat.importSigBit(ff.sig_d[i]);
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qcsat.prepare();
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// Try to find out whether the register bit can change under some circumstances
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bool counter_example_found = qcsat.ez->solve(qcsat.ez->IFF(q_sat_pi, init_sat_pi), qcsat.ez->NOT(qcsat.ez->IFF(d_sat_pi, init_sat_pi)));
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// If the register bit cannot change, we can replace it with a constant
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if (counter_example_found)
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continue;
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}
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}
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if (ff.has_aload) {
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if (!ff.sig_ad[i].wire) {
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val = combine_const(val, ff.sig_ad[i].data);
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if (val == State::Sm)
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continue;
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} else {
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if (!opt.sat)
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continue;
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// For each register bit, try to prove that it cannot change from the initial value. If so, remove it
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if (!modwalker.has_drivers(ff.sig_ad.extract(i)))
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continue;
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if (val != State::S0 && val != State::S1)
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continue;
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int init_sat_pi = qcsat.importSigBit(val);
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int q_sat_pi = qcsat.importSigBit(ff.sig_q[i]);
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int d_sat_pi = qcsat.importSigBit(ff.sig_ad[i]);
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qcsat.prepare();
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// Try to find out whether the register bit can change under some circumstances
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bool counter_example_found = qcsat.ez->solve(qcsat.ez->IFF(q_sat_pi, init_sat_pi), qcsat.ez->NOT(qcsat.ez->IFF(d_sat_pi, init_sat_pi)));
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// If the register bit cannot change, we can replace it with a constant
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if (counter_example_found)
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continue;
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}
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}
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log("Setting constant %d-bit at position %d on %s (%s) from module %s.\n", val ? 1 : 0,
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i, log_id(cell), log_id(cell->type), log_id(module));
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initvals.remove_init(ff.sig_q[i]);
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module->connect(ff.sig_q[i], val);
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removed_sigbits.insert(i);
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}
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if (!removed_sigbits.empty()) {
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std::vector<int> keep_bits;
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for (int i = 0; i < ff.width; i++)
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if (!removed_sigbits.count(i))
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keep_bits.push_back(i);
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if (keep_bits.empty()) {
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module->remove(cell);
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did_something = true;
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continue;
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}
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ff = ff.slice(keep_bits);
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ff.cell = cell;
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changed = true;
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}
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// The cell has been simplified as much as possible already. Now try to spice it up with enables / sync resets.
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if (ff.has_clk) {
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if (!ff.has_arst && !ff.has_sr && (!ff.has_srst || !ff.has_ce || ff.ce_over_srst) && !opt.nosdff) {
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@ -818,6 +721,115 @@ struct OptDffWorker
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}
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return did_something;
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}
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bool run_constbits() {
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ModWalker modwalker(module->design, module);
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QuickConeSat qcsat(modwalker);
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// Run as a separate sub-pass, so that we don't mutate (non-FF) cells under ModWalker.
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bool did_something = false;
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for (auto cell : module->selected_cells()) {
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if (!RTLIL::builtin_ff_cell_types().count(cell->type))
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continue;
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FfData ff(&initvals, cell);
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// Now check if any bit can be replaced by a constant.
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pool<int> removed_sigbits;
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for (int i = 0; i < ff.width; i++) {
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State val = ff.val_init[i];
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if (ff.has_arst)
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val = combine_const(val, ff.val_arst[i]);
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if (ff.has_srst)
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val = combine_const(val, ff.val_srst[i]);
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if (ff.has_sr) {
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if (ff.sig_clr[i] != (ff.pol_clr ? State::S0 : State::S1))
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val = combine_const(val, State::S0);
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if (ff.sig_set[i] != (ff.pol_set ? State::S0 : State::S1))
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val = combine_const(val, State::S1);
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}
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if (val == State::Sm)
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continue;
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if (ff.has_clk || ff.has_gclk) {
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if (!ff.sig_d[i].wire) {
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val = combine_const(val, ff.sig_d[i].data);
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if (val == State::Sm)
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continue;
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} else {
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if (!opt.sat)
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continue;
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// For each register bit, try to prove that it cannot change from the initial value. If so, remove it
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if (!modwalker.has_drivers(ff.sig_d.extract(i)))
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continue;
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if (val != State::S0 && val != State::S1)
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continue;
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int init_sat_pi = qcsat.importSigBit(val);
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int q_sat_pi = qcsat.importSigBit(ff.sig_q[i]);
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int d_sat_pi = qcsat.importSigBit(ff.sig_d[i]);
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qcsat.prepare();
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// Try to find out whether the register bit can change under some circumstances
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bool counter_example_found = qcsat.ez->solve(qcsat.ez->IFF(q_sat_pi, init_sat_pi), qcsat.ez->NOT(qcsat.ez->IFF(d_sat_pi, init_sat_pi)));
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// If the register bit cannot change, we can replace it with a constant
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if (counter_example_found)
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continue;
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}
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}
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if (ff.has_aload) {
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if (!ff.sig_ad[i].wire) {
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val = combine_const(val, ff.sig_ad[i].data);
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if (val == State::Sm)
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continue;
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} else {
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if (!opt.sat)
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continue;
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// For each register bit, try to prove that it cannot change from the initial value. If so, remove it
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if (!modwalker.has_drivers(ff.sig_ad.extract(i)))
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continue;
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if (val != State::S0 && val != State::S1)
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continue;
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int init_sat_pi = qcsat.importSigBit(val);
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int q_sat_pi = qcsat.importSigBit(ff.sig_q[i]);
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int d_sat_pi = qcsat.importSigBit(ff.sig_ad[i]);
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qcsat.prepare();
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// Try to find out whether the register bit can change under some circumstances
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bool counter_example_found = qcsat.ez->solve(qcsat.ez->IFF(q_sat_pi, init_sat_pi), qcsat.ez->NOT(qcsat.ez->IFF(d_sat_pi, init_sat_pi)));
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// If the register bit cannot change, we can replace it with a constant
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if (counter_example_found)
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continue;
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}
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}
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log("Setting constant %d-bit at position %d on %s (%s) from module %s.\n", val ? 1 : 0,
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i, log_id(cell), log_id(cell->type), log_id(module));
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initvals.remove_init(ff.sig_q[i]);
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module->connect(ff.sig_q[i], val);
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removed_sigbits.insert(i);
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}
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if (!removed_sigbits.empty()) {
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std::vector<int> keep_bits;
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for (int i = 0; i < ff.width; i++)
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if (!removed_sigbits.count(i))
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keep_bits.push_back(i);
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if (keep_bits.empty()) {
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module->remove(cell);
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did_something = true;
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continue;
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}
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ff = ff.slice(keep_bits);
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ff.cell = cell;
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ff.emit();
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did_something = true;
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}
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}
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return did_something;
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}
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};
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struct OptDffPass : public Pass {
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@ -894,6 +906,8 @@ struct OptDffPass : public Pass {
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OptDffWorker worker(opt, mod);
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if (worker.run())
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did_something = true;
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if (worker.run_constbits())
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did_something = true;
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}
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if (did_something)
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