Commit Graph

406 Commits

Author SHA1 Message Date
Eddie Hung a37574ccbf Fix muxAB logic 2019-07-23 14:52:14 -07:00
Eddie Hung 0dd2a125f6 Remove debug print 2019-07-23 14:21:45 -07:00
Eddie Hung dc0c853abe Simplify and fix for MACs 2019-07-23 14:20:34 -07:00
Eddie Hung 4f11ff8ebd Fix typo 2019-07-23 13:58:56 -07:00
Eddie Hung 33c984a044 Fix spacing 2019-07-22 16:37:13 -07:00
Eddie Hung 068617f094 Pack hi and lo registers separately 2019-07-22 16:12:57 -07:00
Eddie Hung 4d71ab384d Rename according to vendor doc TN1295 2019-07-22 15:08:26 -07:00
Eddie Hung 304cefbbe2 Pack Y register 2019-07-22 15:05:16 -07:00
Eddie Hung 5a14b6e1f6 Pack adders not just accumulators 2019-07-22 13:01:49 -07:00
Eddie Hung e0720a8018 Restore old ffY behaviour 2019-07-19 22:47:08 -07:00
Eddie Hung f9d08a5e5e Cleanup 2019-07-19 20:25:28 -07:00
Eddie Hung 9ad11ea2cc Fine tune ice40_dsp.pmg, add support for packing subsets of registers 2019-07-19 10:57:32 -07:00
Eddie Hung 8f0e796be1 Add support for ice40 signed multipliers 2019-07-19 10:38:13 -07:00
Eddie Hung 09411dd996 ice40_dsp to accept $__MUL16X16 too 2019-07-18 15:38:28 -07:00
Eddie Hung 802470746c Check if RHS is empty first 2019-07-18 15:22:00 -07:00
Eddie Hung 90ac147eb2 Do not autoremove ffP aor muxP 2019-07-18 15:02:41 -07:00
Eddie Hung 08fe63c61e Improve pattern matcher to match subsets of $dffe? cells 2019-07-18 14:08:18 -07:00
Eddie Hung 79d63479ea Improve A/B reg packing 2019-07-18 13:30:35 -07:00
Eddie Hung e075f0dda0 Do not autoremove A/B registers since they might have other consumers 2019-07-18 13:22:22 -07:00
Eddie Hung 0727b2c902 Fix xilinx_dsp index cast 2019-07-18 13:18:04 -07:00
Eddie Hung c76607b9bc Wrong wildcard symbol 2019-07-18 08:14:58 -07:00
Eddie Hung 91629ee4b3 Pattern matcher to check pool of bits, not exactly 2019-07-17 12:45:25 -07:00
Eddie Hung 3f677fb0db Signed extension 2019-07-16 15:54:07 -07:00
Eddie Hung 9616dbd125 Add support {A,B,P}REG packing 2019-07-16 14:06:32 -07:00
Eddie Hung 5f00d335d4 Oops forgot these files 2019-07-15 15:03:15 -07:00
Eddie Hung dd59375a66 Add xilinx_dsp for register packing 2019-07-15 14:46:31 -07:00
Clifford Wolf cb285e4b87 Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-28 17:17:56 +02:00
Clifford Wolf b37c31e2cb Bugfix in peepopt_shiftmul.pmg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-06 15:34:19 +02:00
Clifford Wolf 2b29aa5c86 Update pmgen documentation
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-03 08:35:45 +02:00
Clifford Wolf e8c5afcb84 Fix typo
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-05-03 08:25:30 +02:00
Clifford Wolf b515fd2d25 Add peepopt_muldiv, fixes #930
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 11:25:15 +02:00
Clifford Wolf 4306bebe58 pmgen progress
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 10:51:51 +02:00
Clifford Wolf bb4f3642de Some pmgen reorg, rename peepopt.pmg to peepopt_shiftmul.pmg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 08:04:22 +02:00
Clifford Wolf 58238da133 Progress in shiftmul peepopt pattern
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-30 07:59:39 +02:00
Clifford Wolf ea547bcaa3 Add "peepopt" skeleton
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-29 13:38:56 +02:00
Clifford Wolf 9f792c599d Add pmgen support for multiple patterns in one matcher
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-29 13:02:05 +02:00
Clifford Wolf 32881a989c Support multiple pmg files (right now just concatenated together)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-29 12:09:02 +02:00
Eddie Hung 408161ea3a
Misspelling 2019-04-25 16:46:13 -07:00
Eddie Hung 0deaccbaae
Fix a few typos 2019-04-08 16:46:33 -07:00
Eddie Hung d03780c3f4
Fix spelling in pmgen/README.md 2019-03-05 17:55:29 -08:00
Larry Doolittle 57f8bb471f Try again for passes/pmgen/ice40_dsp_pm.h rule
Tested on both in-tree and out-of-tree builds
2019-03-01 20:20:53 -08:00
Larry Doolittle e2fc18f27b Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
Clifford Wolf 68a6937173 Fix pmgen for in-tree builds
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:56:05 -08:00
Clifford Wolf 64d91219b4 Fix pmgen for out-of-tree build
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-28 14:00:58 -08:00
Clifford Wolf 893194689d Fix typo in passes/pmgen/README.md
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 18:50:02 +01:00
Clifford Wolf 2fe1c830eb Bugfix in ice40_dsp
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-21 13:28:46 +01:00
Clifford Wolf 218e9051bb Add "synth_ice40 -dsp"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 16:42:27 +01:00
Clifford Wolf dca65d83a0 Detect and reject cases that do not map well to iCE40 DSPs (yet)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-20 11:18:19 +01:00
Clifford Wolf 5a853ed46c Add actual DSP inference to ice40_dsp pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-02-17 15:35:48 +01:00
Clifford Wolf 8ddec5d882 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 5216735210 Progress in pmgen, add pmgen README
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 55ac030382 Fix pmgen "reject" statement
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf d45379936b Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf 1f8e76f993 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf b9545aa0e1 Progress in pmgen
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00
Clifford Wolf ad69c668ce Add mockup .pmg (pattern matcher generator) file
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-01-15 11:23:25 +01:00