70 Commits

Author	SHA1	Message	Date
manarabdelaty	53b3a9013e	[DATA] Update HK pin placement	2021-11-19 01:30:14 +02:00
manarabdelaty	37a07e291b	[DATA] Update digital_pll pin placement to have it align with the HK	2021-11-19 01:28:40 +02:00
manarabdelaty	64bdd6230d	[DATA] Update caravel_clocking module floorplan	2021-11-19 01:26:29 +02:00
manarabdelaty	3cc88cd7fd	Add USE POWER/USE GROUND properties to the simple_port lef view	2021-11-17 17:57:23 +02:00
manarabdelaty	1f55f46596	[DATA] Add chip_io views with the fixed clamped3 pad	2021-11-17 16:42:36 +02:00
manarabdelaty	1b300d7b59	[DATA] Add digital user project wrapper	2021-11-17 13:13:11 +02:00
manarabdelaty	098b4befb2	Add gds view for chip_io	2021-11-15 23:02:01 +02:00
manarabdelaty	46540437af	[DATA] Add gds/lef/maglef/gl views for the user_id_programming block	2021-11-15 18:17:32 +02:00
manarabdelaty	10cf11fbf5	Add gds/lef views for simple_por	2021-11-15 18:08:22 +02:00
manarabdelaty	6203460f57	[DATA] Add views for xres_buf	2021-11-15 18:07:02 +02:00
manarabdelaty	72b2c724c9	[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz	2021-11-15 15:50:43 +02:00
manarabdelaty	56f672bbd8	[DATA] Add HK views	2021-11-15 13:23:54 +02:00
manarabdelaty	85a1ffc5aa	[DATA] Add views for the mgmt_protect	2021-11-15 13:21:52 +02:00
manarabdelaty	bee7b4ed78	Add initial config for the digital_pll	2021-11-08 13:34:59 +02:00
manarabdelaty	59076d499a	Update gpio_defaults_block to align the pins with the gpio_control_block	2021-11-05 23:27:32 +02:00
manarabdelaty	49c506f052	Update gpio_control_block after constrainting the clock period to be half the mgmt_core frequency	2021-11-05 18:36:43 +02:00
manarabdelaty	e68664101c	Update gpio_control_block	2021-11-05 16:54:55 +02:00
manarabdelaty	53b09f43d1	Add gpio_defaults_block views	2021-11-05 12:33:36 +02:00
manarabdelaty	78ce7265c1	Update gpio_control block	2021-11-04 17:58:58 +02:00
manarabdelaty	cb9990f97e	harden gpio_control_block	2021-11-04 16:19:12 +02:00