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caravel
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97 Commits

Author SHA1 Message Date
Tim Edwards 589f351dcb Additional modification to move pins up into an uncongested area 
above housekeeping, because the upper GPIO pins are in the wrong
place relative to the new GPIO signal routing below the SoC.
Added pins for the pass-through connections.  Unconnected/
unrouted OEB pins are still not present and probably should be
removed from the RTL.
 2022-10-16 10:52:53 -04:00
Tim Edwards 43b8f9d4fe Merge branch 'caravel_redesign' into fix_top_buffers_again 
Updating to the most recent caravel_redesign branch version.
 2022-10-16 10:05:36 -04:00
Tim Edwards dcc3c56b83 Some additional corrections to the gpio_signal_buffering cells. 
Corrected one instance where a buffer had incorrectly been replaced
with a decap cell.  Moved the left-hand side in by 0.6um to clear
the chip_io connections on the left-hand side.  Corrected a small
DRC error in a route position at the bottom.
 2022-10-16 09:50:20 -04:00
Marwan Abbas 6c6fa6b502
Merge pull request #255 from efabless/caravel_power_routing-sync-views 
caravel_power_routing updates
 2022-10-16 14:15:19 +02:00
kareem 914971d253 + add pr boundary for caravel_power_routing 
based on feedback from tim in order to generate a lef view
with a zero origin and avoid any hacks

+ add caravel_power_routing lef
+ sync caravel_power_routing gds and mag
 2022-10-16 04:41:29 -07:00
mo-hosni 22dde425ac add mgmt_protect views and openlane files 2022-10-16 03:14:55 -07:00
Tim Edwards a77a45babe Adjustments to the top level buffering cells to do various things 
like avoid obstructions in the padframe and power routing, add
decap, and separate coupling wires to reduce capacitance.
 2022-10-15 17:35:17 -04:00
kareem 5d5d019ea1 Revert "add buff_flash_clkrst" 
This reverts commit 2675487322.
 2022-10-15 08:47:02 -07:00
Tim Edwards 3db846b119 Fixes issues with the GPIO signal buffering by applying a bounding 
box to the layout, so that LEF and DEF positions are correct.
 2022-10-15 10:31:35 -04:00
mo-hosni 2675487322 add buff_flash_clkrst 2022-10-15 06:38:42 -07:00
Marwan Abbas 316f2dbb58
Merge pull request #238 from mo-hosni/update_mgmt_protect 
Update mgmt protect
 2022-10-15 11:27:59 +02:00
mo-hosni 3361c8787d Add mgmt_protect views and openlane files 2022-10-15 01:46:22 -07:00
passant5 8c0e4f7403
Merge branch 'caravel_redesign' into add_top_level_buffers 2022-10-15 00:28:14 +02:00
Tim Edwards 65573a64a6 Revised the LEF view of mgmt_protect_hv, since it has changed due 
to the increase of the horizontal m3 buses (pins) to 0.5um.
 2022-10-14 17:06:45 -04:00
Tim Edwards 92e2f5e8a4 Added layout views (.mag, GDS, DEF, and LEF) for the caravan 
variant of the top level GPIO signal buffering (module
gpio_signal_buffering_alt).
 2022-10-14 16:06:11 -04:00
mo-hosni 0e01725608 add housekeeping views 2022-10-14 09:26:34 -07:00
kareem aadfb57609 reharden: caravel_clocking 
~ align pdn with top level
~ move spefs and sdfs output corners to signoff/*/openlane-signoff
 2022-10-14 05:24:49 -07:00
Tim Edwards 46d44793e2 Added layout for the gpio_signal_buffering module, including GDS, 
LEF, DEF, and magic views.
 2022-10-13 21:59:10 -04:00
Marwan Abbas f7299933ee
Merge pull request #217 from mo-hosni/buff_flash_clkrst 
Buff flash clkrst
 2022-10-13 20:53:18 +02:00
Marwan Abbas 14856fea6d
Merge pull request #216 from mo-hosni/housekeeping_final_views 
Housekeeping final views
 2022-10-13 20:47:09 +02:00
Marwan Abbas e72f819020
Merge pull request #210 from mo-hosni/final_views 
mgmt_protect final views
 2022-10-13 20:33:57 +02:00
Marwan Abbas 08ac55bed8
Merge pull request #214 from efabless/caravel_clocking-buffering 
Caravel clocking reharden
 2022-10-13 20:13:45 +02:00
kareem c922241c3f reharden: caravel_clocking 
+ add custom interactive script to insert a buffer on user_clk output
and have a large buffer on core_clk
~ change pdn config to match top level
~ change sdc
~ change openlane configuration
 2022-10-13 10:54:04 -07:00
mo-hosni 889aa7e308 add buff_flash_clkrst 2022-10-13 10:35:51 -07:00
mo-hosni 0389423ea6 add housekeeping 2022-10-13 10:15:05 -07:00
mo-hosni 1aaebf5cbb add mgmt_protect 2022-10-13 10:11:45 -07:00
kareem 59743f4832 change buf16 to clkbuf16 and reimplement 2022-10-13 06:54:55 -07:00
kareem 0eed96f33f reharden: digital_pll 
~ reimplement digital_pll using updated RTL
~ changes in config to generate same PDN
~ change deprecated variables
 2022-10-13 06:21:08 -07:00
Mohamed Shalan 98951388d0
Merge pull request #179 from efabless/chip_io_fix_ports 
Fixes the .mag, LEF, DEF, and GDS views of chip_io and chip_io_alt
 2022-10-12 11:37:24 +02:00
mo-hosni 76f8d37496 Rehardened housekeeping to fix Antenna violations. 2022-10-11 16:41:50 -07:00
Tim Edwards a2feddf714 Corrected the layout views of chip_io and chip_io_alt, which were 
missing some of the labels for the power supplies (they were
accidentally erased during layout re-work).
 2022-10-11 11:39:03 -04:00
Mohamed Hosni ee17bcf177
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-11 01:47:06 -07:00
mo-hosni df05079b6f update houskeepong powere netlst and fixed some antenna violations 2022-10-11 01:46:23 -07:00
Mohamed Shalan 4f1ee965a9
Merge pull request #170 from efabless/update_por_lef 
Updated the LEF of simple_por
 2022-10-11 10:40:11 +02:00
Mohamed Shalan 344f806980
Merge pull request #166 from efabless/gpio_control_block-sparecell 
gpio_control_block sparecell
 2022-10-11 10:39:50 +02:00
Tim Edwards 67a12304fa Updated the LEF of simple_por, which was generated without the 
"-hide" option, but was also missing the metals 2 and 3 over the
substrate contact, allowing routes on those layers to short to
the actual layout.  The new LEF properly reflects the current
version of the POR layout.
 2022-10-10 20:58:07 -04:00
kareem f4218ddde9 reharden!: gpio_control_block 
- reimplement using a sparecell
- reimplement using newest open_pdks

!important using openlane pre odb with some local patches which
most if not all are merged in the current head of openlane however
still takes effort to update the interactive script to be latest
openlane compatible

!important override abstract lef generated by openlane. openlane
 generates lef and mag that contain def BLOCKAGE layers that cause
congestions during top level routing
 2022-10-10 05:42:29 -07:00
Mohamed Hosni 40098f693e
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-10 05:08:33 -07:00
Mohamed Hosni fa441babea
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-10 01:24:24 -07:00
mo-hosni 7a7690ba10 Update housekeeping 2022-10-10 01:21:51 -07:00
mo-hosni 7e5891dd9f Update mgmt_protect 2022-10-10 01:19:40 -07:00
Tim Edwards 2459b3583e Updated all views of chip_io and chip_io_alt based on the abstract 
view of constant_block which was recently merged into the repository.
The constant_block instance positions and connections were modified
slightly to avoid routing over obstruction areas.
 2022-10-09 14:20:43 -04:00
Mohamed Shalan 7538c8c776
Merge pull request #161 from efabless/chip_io_rework 2022-10-09 16:31:28 +02:00
Tim Edwards eceb71ee04 Added GDS, DEF, and LEF views of both chip_io and chip_io_alt. 2022-10-08 22:24:38 -04:00
mo-hosni dde6e034e0 added constant_block view 2022-10-08 12:05:53 -07:00
mo-hosni d6ca7f9091 rehardened housekeeping after rtl update, and fixed all hold and transition violations. 2022-10-07 16:59:01 -07:00
Mohamed Hosni 5c38e38767
Merge branch 'efabless:caravel_redesign' into caravel_redesign 2022-10-07 16:52:16 -07:00
kareem 6d1d618974 reharden!: gpio_control_block 
- rtl updated
~ add one column to the right to pass placement congestion
~ density adjusted (probably has no effect)
+ manually add isosubstrate layer in mag and gds from older iterations

!important still need to run dynamic simulations
!important depends on some updates to openlane
!important need to be able to recreate using newer openlane versions
 2022-10-07 05:02:14 -07:00
mo-hosni 9c850bf94b rehardened housekeeping 2022-10-05 12:35:03 -07:00
mo-hosni fcc009e65a rehardeneded mgmt_protect 2022-10-05 12:26:24 -07:00