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caravel
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Corrected the layout views of chip_io and chip_io_alt, which were 

missing some of the labels for the power supplies (they were
accidentally erased during layout re-work).
This commit is contained in:
Tim Edwards 2022-10-11 11:39:03 -04:00
parent b0abb4e164
commit a2feddf714
9 changed files with 2125 additions and 2873 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

501
def/chip_io.def
View File

@ -17466,7 +17466,7 @@ COMPONENTS 818 ;
+ PLACED ( 3388000 4984000 ) N ;
END COMPONENTS
PINS 691 ;
PINS 698 ;
- clock + NET clock
+ DIRECTION INPUT
+ USE SIGNAL
@ -20844,9 +20844,30 @@ PINS 691 ;
- porb_h + NET porb_h
+ PORT
+ LAYER met2 ( -140 -1200 ) ( 140 1200 ) + PLACED ( 1541415 209765 ) N ;
- vccd + NET vccd
+ PORT
+ LAYER met4 ( -2725 -635 ) ( 2725 635 ) + PLACED ( 195240 2278365 ) N ;
- vdda1 + NET vdda1
+ PORT
+ LAYER met4 ( -1725 -482.5 ) ( 1725 482.5 ) + PLACED ( 3404660 2299482.5 ) N ;
- vddio + NET vddio
+ PORT
+ LAYER met4 ( -1725 -635 ) ( 1725 635 ) + PLACED ( 166390 2278365 ) N ;
- vssa + NET vssa
+ PORT
+ LAYER met4 ( -37500 -165 ) ( 37500 165 ) + PLACED ( 700500 143430 ) N ;
- vssa1 + NET vssa1
+ PORT
+ LAYER met4 ( -165 -37500 ) ( 165 37500 ) + PLACED ( 3444570 2336500 ) N ;
- vssd + NET vssd
+ PORT
+ LAYER met4 ( -635 -2325 ) ( 635 2325 ) + PLACED ( 663635 156090 ) N ;
- vssio + NET vssio
+ PORT
+ LAYER met4 ( -12107.5 -1122.5 ) ( 12107.5 1122.5 ) + PLACED ( 12107.5 2279347.5 ) N ;
END PINS
NONDEFAULTRULES 97 ;
NONDEFAULTRULES 100 ;
- met4_width_670
+ LAYER met4 WIDTH 670 ;
- met2_width_205
@ -20869,6 +20890,8 @@ NONDEFAULTRULES 97 ;
+ LAYER met4 WIDTH 480 ;
- met4_width_640
+ LAYER met4 WIDTH 640 ;
- met4_width_1270
+ LAYER met4 WIDTH 1270 ;
- met4_width_470
+ LAYER met4 WIDTH 470 ;
- met3_width_16820
@ -20967,6 +20990,8 @@ NONDEFAULTRULES 97 ;
+ LAYER met4 WIDTH 580 ;
- met3_width_455
+ LAYER met3 WIDTH 455 ;
- met4_width_965
+ LAYER met4 WIDTH 965 ;
- met4_width_740
+ LAYER met4 WIDTH 740 ;
- met4_width_570
@ -20989,6 +21014,8 @@ NONDEFAULTRULES 97 ;
+ LAYER met2 WIDTH 280 ;
- met4_width_530
+ LAYER met4 WIDTH 530 ;
- met4_width_2245
+ LAYER met4 WIDTH 2245 ;
- met2_width_270
+ LAYER met2 WIDTH 270 ;
- met4_width_520
@ -21328,97 +21355,97 @@ NETS 995 ;
( mprj_pads.area1_io_pad\[9\] IN_H ) ;
- vssa1_pad ( user1_vssa_hvclamp_pad\[0\] VSSA_PAD )
+ ROUTED met5 TAPERRULE met5_width_60820 ( 2885850 5123530 ) ( 2945090 * ) ;
- gpio_pad/VDDIO ( gpio_pad VDDIO ) ( FILLER_169 VSWITCH )
( FILLER_168 VSWITCH ) ( FILLER_167 VSWITCH )
( FILLER_166 VSWITCH ) ( FILLER_165 VSWITCH )
( FILLER_164 VSWITCH ) ( FILLER_163 VSWITCH )
( FILLER_162 VSWITCH ) ( FILLER_161 VSWITCH )
( FILLER_160 VSWITCH ) ( FILLER_159 VSWITCH )
( FILLER_158 VSWITCH ) ( FILLER_157 VSWITCH )
( mprj_pads.area1_io_pad\[15\] VSWITCH ) ( FILLER_155 VSWITCH )
( FILLER_154 VSWITCH ) ( FILLER_153 VSWITCH )
( FILLER_152 VSWITCH ) ( FILLER_151 VSWITCH )
( FILLER_150 VSWITCH ) ( FILLER_149 VSWITCH )
( FILLER_148 VSWITCH ) ( FILLER_147 VSWITCH )
( FILLER_146 VSWITCH ) ( FILLER_145 VSWITCH )
( FILLER_144 VSWITCH ) ( user1_vssa_hvclamp_pad\[0\] VSWITCH )
( FILLER_142 VSWITCH ) ( FILLER_141 VSWITCH )
( FILLER_140 VSWITCH ) ( FILLER_139 VSWITCH )
( FILLER_138 VSWITCH ) ( FILLER_137 VSWITCH )
( FILLER_136 VSWITCH ) ( FILLER_135 VSWITCH )
( FILLER_134 VSWITCH ) ( FILLER_133 VSWITCH )
( FILLER_132 VSWITCH ) ( FILLER_131 VSWITCH )
( mprj_pads.area1_io_pad\[16\] VSWITCH ) ( FILLER_129 VSWITCH )
( FILLER_128 VSWITCH ) ( FILLER_127 VSWITCH )
( FILLER_126 VSWITCH ) ( FILLER_125 VSWITCH )
( FILLER_124 VSWITCH ) ( FILLER_123 VSWITCH )
( FILLER_122 VSWITCH ) ( FILLER_121 VSWITCH )
( FILLER_120 VSWITCH ) ( FILLER_119 VSWITCH )
( mprj_pads.area1_io_pad\[17\] VSWITCH ) ( FILLER_118 VSWITCH )
( FILLER_116 VSWITCH ) ( FILLER_115 VSWITCH )
( FILLER_114 VSWITCH ) ( FILLER_113 VSWITCH )
( FILLER_112 VSWITCH ) ( FILLER_111 VSWITCH )
( FILLER_110 VSWITCH ) ( FILLER_109 VSWITCH )
( FILLER_108 VSWITCH ) ( FILLER_107 VSWITCH )
( FILLER_106 VSWITCH ) ( FILLER_105 VSWITCH )
( FILLER_104 VSWITCH ) ( FILLER_103 VSWITCH )
( FILLER_102 VSWITCH ) ( FILLER_101 VSWITCH )
( FILLER_100 VSWITCH ) ( FILLER_99 VSWITCH )
( FILLER_98 VSWITCH ) ( mprj_pads.area1_io_pad\[18\] VSWITCH )
( FILLER_96 VSWITCH ) ( FILLER_95 VSWITCH )
( FILLER_94 VSWITCH ) ( FILLER_93 VSWITCH )
( FILLER_92 VSWITCH ) ( FILLER_91 VSWITCH )
( FILLER_90 VSWITCH ) ( FILLER_89 VSWITCH )
( FILLER_88 VSWITCH ) ( FILLER_87 VSWITCH )
( FILLER_86 VSWITCH ) ( disconnect_vdda_0 VSWITCH )
( FILLER_SB3 VSWITCH ) ( mgmt_vssio_hvclamp_pad\[1\] VSWITCH )
( FILLER_82 VSWITCH ) ( FILLER_81 VSWITCH )
( FILLER_80 VSWITCH ) ( FILLER_79 VSWITCH )
( FILLER_78 VSWITCH ) ( FILLER_77 VSWITCH )
( FILLER_76 VSWITCH ) ( FILLER_75 VSWITCH )
( FILLER_74 VSWITCH ) ( FILLER_73 VSWITCH )
( FILLER_72 VSWITCH ) ( FILLER_71 VSWITCH )
( mprj_pads.area2_io_pad\[0\] VSWITCH ) ( FILLER_69 VSWITCH )
( FILLER_68 VSWITCH ) ( FILLER_67 VSWITCH )
( FILLER_66 VSWITCH ) ( FILLER_65 VSWITCH )
( FILLER_64 VSWITCH ) ( FILLER_63 VSWITCH )
( FILLER_62 VSWITCH ) ( FILLER_61 VSWITCH )
( FILLER_60 VSWITCH ) ( FILLER_59 VSWITCH )
( FILLER_58 VSWITCH ) ( FILLER_57 VSWITCH )
( mprj_pads.area2_io_pad\[1\] VSWITCH ) ( FILLER_55 VSWITCH )
( FILLER_54 VSWITCH ) ( FILLER_53 VSWITCH )
( FILLER_52 VSWITCH ) ( FILLER_51 VSWITCH )
( FILLER_50 VSWITCH ) ( FILLER_49 VSWITCH )
( FILLER_48 VSWITCH ) ( FILLER_47 VSWITCH )
( FILLER_46 VSWITCH ) ( FILLER_45 VSWITCH )
( FILLER_44 VSWITCH ) ( mprj_pads.area2_io_pad\[2\] VSWITCH )
( FILLER_42 VSWITCH ) ( FILLER_41 VSWITCH )
( FILLER_40 VSWITCH ) ( FILLER_39 VSWITCH )
( FILLER_38 VSWITCH ) ( FILLER_37 VSWITCH )
( FILLER_36 VSWITCH ) ( FILLER_35 VSWITCH )
( FILLER_34 VSWITCH ) ( FILLER_33 VSWITCH )
( FILLER_32 VSWITCH ) ( FILLER_31 VSWITCH )
( mprj_pads.area2_io_pad\[3\] VSWITCH ) ( FILLER_29 VSWITCH )
( FILLER_28 VSWITCH ) ( FILLER_27 VSWITCH )
( FILLER_26 VSWITCH ) ( FILLER_25 VSWITCH )
( FILLER_24 VSWITCH ) ( FILLER_23 VSWITCH )
( FILLER_22 VSWITCH ) ( FILLER_21 VSWITCH )
( FILLER_20 VSWITCH ) ( FILLER_19 VSWITCH )
( FILLER_18 VSWITCH ) ( mprj_pads.area2_io_pad\[4\] VSWITCH )
( FILLER_16 VSWITCH ) ( FILLER_15 VSWITCH )
( FILLER_14 VSWITCH ) ( FILLER_13 VSWITCH )
( FILLER_12 VSWITCH ) ( FILLER_11 VSWITCH )
( FILLER_10 VSWITCH ) ( FILLER_9 VSWITCH ) ( FILLER_8 VSWITCH )
( FILLER_7 VSWITCH ) ( FILLER_6 VSWITCH ) ( FILLER_169 VDDIO )
( FILLER_5 VSWITCH ) ( FILLER_168 VDDIO ) ( FILLER_167 VDDIO )
( FILLER_166 VDDIO ) ( FILLER_165 VDDIO ) ( FILLER_164 VDDIO )
( FILLER_163 VDDIO ) ( FILLER_162 VDDIO ) ( FILLER_161 VDDIO )
( FILLER_160 VDDIO ) ( FILLER_159 VDDIO ) ( FILLER_158 VDDIO )
( FILLER_157 VDDIO ) ( mprj_pads.area1_io_pad\[15\] VDDIO )
( FILLER_155 VDDIO ) ( FILLER_154 VDDIO ) ( FILLER_153 VDDIO )
( FILLER_152 VDDIO ) ( FILLER_151 VDDIO ) ( FILLER_150 VDDIO )
( FILLER_149 VDDIO ) ( FILLER_148 VDDIO ) ( FILLER_147 VDDIO )
( FILLER_146 VDDIO ) ( FILLER_145 VDDIO ) ( FILLER_144 VDDIO )
- vddio ( FILLER_169 VSWITCH ) ( FILLER_168 VSWITCH )
( FILLER_167 VSWITCH ) ( FILLER_166 VSWITCH )
( FILLER_165 VSWITCH ) ( FILLER_164 VSWITCH )
( FILLER_163 VSWITCH ) ( FILLER_162 VSWITCH )
( FILLER_161 VSWITCH ) ( FILLER_160 VSWITCH )
( FILLER_159 VSWITCH ) ( FILLER_158 VSWITCH )
( FILLER_157 VSWITCH ) ( mprj_pads.area1_io_pad\[15\] VSWITCH )
( FILLER_155 VSWITCH ) ( FILLER_154 VSWITCH )
( FILLER_153 VSWITCH ) ( FILLER_152 VSWITCH )
( FILLER_151 VSWITCH ) ( FILLER_150 VSWITCH )
( FILLER_149 VSWITCH ) ( FILLER_148 VSWITCH )
( FILLER_147 VSWITCH ) ( FILLER_146 VSWITCH )
( FILLER_145 VSWITCH ) ( FILLER_144 VSWITCH )
( user1_vssa_hvclamp_pad\[0\] VSWITCH ) ( FILLER_142 VSWITCH )
( FILLER_141 VSWITCH ) ( FILLER_140 VSWITCH )
( FILLER_139 VSWITCH ) ( FILLER_138 VSWITCH )
( FILLER_137 VSWITCH ) ( FILLER_136 VSWITCH )
( FILLER_135 VSWITCH ) ( FILLER_134 VSWITCH )
( FILLER_133 VSWITCH ) ( FILLER_132 VSWITCH )
( FILLER_131 VSWITCH ) ( mprj_pads.area1_io_pad\[16\] VSWITCH )
( FILLER_129 VSWITCH ) ( FILLER_128 VSWITCH )
( FILLER_127 VSWITCH ) ( FILLER_126 VSWITCH )
( FILLER_125 VSWITCH ) ( FILLER_124 VSWITCH )
( FILLER_123 VSWITCH ) ( FILLER_122 VSWITCH )
( FILLER_121 VSWITCH ) ( FILLER_120 VSWITCH )
( FILLER_119 VSWITCH ) ( mprj_pads.area1_io_pad\[17\] VSWITCH )
( FILLER_118 VSWITCH ) ( FILLER_116 VSWITCH )
( FILLER_115 VSWITCH ) ( FILLER_114 VSWITCH )
( FILLER_113 VSWITCH ) ( FILLER_112 VSWITCH )
( FILLER_111 VSWITCH ) ( FILLER_110 VSWITCH )
( FILLER_109 VSWITCH ) ( FILLER_108 VSWITCH )
( FILLER_107 VSWITCH ) ( FILLER_106 VSWITCH )
( FILLER_105 VSWITCH ) ( FILLER_104 VSWITCH )
( FILLER_103 VSWITCH ) ( FILLER_102 VSWITCH )
( FILLER_101 VSWITCH ) ( FILLER_100 VSWITCH )
( FILLER_99 VSWITCH ) ( FILLER_98 VSWITCH )
( mprj_pads.area1_io_pad\[18\] VSWITCH ) ( FILLER_96 VSWITCH )
( FILLER_95 VSWITCH ) ( FILLER_94 VSWITCH )
( FILLER_93 VSWITCH ) ( FILLER_92 VSWITCH )
( FILLER_91 VSWITCH ) ( FILLER_90 VSWITCH )
( FILLER_89 VSWITCH ) ( FILLER_88 VSWITCH )
( FILLER_87 VSWITCH ) ( FILLER_86 VSWITCH )
( disconnect_vdda_0 VSWITCH ) ( FILLER_SB3 VSWITCH )
( mgmt_vssio_hvclamp_pad\[1\] VSWITCH ) ( FILLER_82 VSWITCH )
( FILLER_81 VSWITCH ) ( FILLER_80 VSWITCH )
( FILLER_79 VSWITCH ) ( FILLER_78 VSWITCH )
( FILLER_77 VSWITCH ) ( FILLER_76 VSWITCH )
( FILLER_75 VSWITCH ) ( FILLER_74 VSWITCH )
( FILLER_73 VSWITCH ) ( FILLER_72 VSWITCH )
( FILLER_71 VSWITCH ) ( mprj_pads.area2_io_pad\[0\] VSWITCH )
( FILLER_69 VSWITCH ) ( FILLER_68 VSWITCH )
( FILLER_67 VSWITCH ) ( FILLER_66 VSWITCH )
( FILLER_65 VSWITCH ) ( FILLER_64 VSWITCH )
( FILLER_63 VSWITCH ) ( FILLER_62 VSWITCH )
( FILLER_61 VSWITCH ) ( FILLER_60 VSWITCH )
( FILLER_59 VSWITCH ) ( FILLER_58 VSWITCH )
( FILLER_57 VSWITCH ) ( mprj_pads.area2_io_pad\[1\] VSWITCH )
( FILLER_55 VSWITCH ) ( FILLER_54 VSWITCH )
( FILLER_53 VSWITCH ) ( FILLER_52 VSWITCH )
( FILLER_51 VSWITCH ) ( FILLER_50 VSWITCH )
( FILLER_49 VSWITCH ) ( FILLER_48 VSWITCH )
( FILLER_47 VSWITCH ) ( FILLER_46 VSWITCH )
( FILLER_45 VSWITCH ) ( FILLER_44 VSWITCH )
( mprj_pads.area2_io_pad\[2\] VSWITCH ) ( FILLER_42 VSWITCH )
( FILLER_41 VSWITCH ) ( FILLER_40 VSWITCH )
( FILLER_39 VSWITCH ) ( FILLER_38 VSWITCH )
( FILLER_37 VSWITCH ) ( FILLER_36 VSWITCH )
( FILLER_35 VSWITCH ) ( FILLER_34 VSWITCH )
( FILLER_33 VSWITCH ) ( FILLER_32 VSWITCH )
( FILLER_31 VSWITCH ) ( mprj_pads.area2_io_pad\[3\] VSWITCH )
( FILLER_29 VSWITCH ) ( FILLER_28 VSWITCH )
( FILLER_27 VSWITCH ) ( FILLER_26 VSWITCH )
( FILLER_25 VSWITCH ) ( FILLER_24 VSWITCH )
( FILLER_23 VSWITCH ) ( FILLER_22 VSWITCH )
( FILLER_21 VSWITCH ) ( FILLER_20 VSWITCH )
( FILLER_19 VSWITCH ) ( FILLER_18 VSWITCH )
( mprj_pads.area2_io_pad\[4\] VSWITCH ) ( FILLER_16 VSWITCH )
( FILLER_15 VSWITCH ) ( FILLER_14 VSWITCH )
( FILLER_13 VSWITCH ) ( FILLER_12 VSWITCH )
( FILLER_11 VSWITCH ) ( FILLER_10 VSWITCH )
( FILLER_9 VSWITCH ) ( FILLER_8 VSWITCH ) ( FILLER_7 VSWITCH )
( FILLER_6 VSWITCH ) ( FILLER_169 VDDIO ) ( FILLER_5 VSWITCH )
( FILLER_168 VDDIO ) ( FILLER_167 VDDIO ) ( FILLER_166 VDDIO )
( FILLER_165 VDDIO ) ( FILLER_164 VDDIO ) ( FILLER_163 VDDIO )
( FILLER_162 VDDIO ) ( FILLER_161 VDDIO ) ( FILLER_160 VDDIO )
( FILLER_159 VDDIO ) ( FILLER_158 VDDIO ) ( FILLER_157 VDDIO )
( mprj_pads.area1_io_pad\[15\] VDDIO ) ( FILLER_155 VDDIO )
( FILLER_154 VDDIO ) ( FILLER_153 VDDIO ) ( FILLER_152 VDDIO )
( FILLER_151 VDDIO ) ( FILLER_150 VDDIO ) ( FILLER_149 VDDIO )
( FILLER_148 VDDIO ) ( FILLER_147 VDDIO ) ( FILLER_146 VDDIO )
( FILLER_145 VDDIO ) ( FILLER_144 VDDIO )
( user1_vssa_hvclamp_pad\[0\] VDDIO ) ( FILLER_142 VDDIO )
( FILLER_141 VDDIO ) ( FILLER_140 VDDIO ) ( FILLER_139 VDDIO )
( FILLER_138 VDDIO ) ( FILLER_137 VDDIO ) ( FILLER_136 VDDIO )
@ -21719,7 +21746,7 @@ NETS 995 ;
( FILLER_476 VSWITCH ) ( FILLER_476 VDDIO )
( FILLER_697 VSWITCH ) ( FILLER_697 VDDIO )
( FILLER_696 VSWITCH ) ( FILLER_475 VSWITCH )
( FILLER_475 VDDIO ) ( FILLER_696 VDDIO )
( gpio_pad VDDIO ) ( FILLER_475 VDDIO ) ( FILLER_696 VDDIO )
( FILLER_695 VSWITCH ) ( FILLER_695 VDDIO )
( FILLER_694 VSWITCH ) ( FILLER_694 VDDIO )
( FILLER_693 VSWITCH ) ( FILLER_693 VDDIO )
@ -22089,7 +22116,8 @@ NETS 995 ;
( bus_tie_4 VDDIO ) ( bus_tie_3 VDDIO ) ( bus_tie_2 VDDIO )
( bus_tie_1 VDDIO ) ( FILLER_174 VDDIO ) ( FILLER_173 VDDIO )
( FILLER_172 VDDIO ) ( FILLER_171 VDDIO ) ( FILLER_170 VDDIO )
( mgmt_corner\[0\] VDDIO ) ;
( mgmt_corner\[0\] VDDIO )
+ ROUTED met4 TAPERRULE met4_width_1270 ( 164815 2278365 ) ( 167965 * ) ;
- gpio_pad/VDDIO_Q ( gpio_pad VDDIO_Q ) ( FILLER_169 VDDIO_Q )
( FILLER_168 VDDIO_Q ) ( FILLER_167 VDDIO_Q )
( FILLER_166 VDDIO_Q ) ( FILLER_165 VDDIO_Q )
@ -22902,10 +22930,9 @@ NETS 995 ;
( FILLER_173 VSSIO_Q ) ( FILLER_172 VSSIO_Q )
( FILLER_171 VSSIO_Q ) ( FILLER_170 VSSIO_Q )
( mgmt_corner\[0\] VSSIO_Q ) ;
- gpio_pad/VSSA ( gpio_pad VSSA ) ( FILLER_402 VSSA )
( FILLER_401 VSSA ) ( FILLER_400 VSSA ) ( FILLER_399 VSSA )
( FILLER_398 VSSA ) ( FILLER_397 VSSA ) ( FILLER_396 VSSA )
( FILLER_395 VSSA ) ( FILLER_394 VSSA )
- vssa ( FILLER_402 VSSA ) ( FILLER_401 VSSA ) ( FILLER_400 VSSA )
( FILLER_399 VSSA ) ( FILLER_398 VSSA ) ( FILLER_397 VSSA )
( FILLER_396 VSSA ) ( FILLER_395 VSSA ) ( FILLER_394 VSSA )
( mgmt_vddio_hvclamp_pad\[0\] VSSA ) ( FILLER_392 VSSA )
( FILLER_391 VSSA ) ( FILLER_390 VSSA ) ( FILLER_389 VSSA )
( FILLER_388 VSSA ) ( FILLER_387 VSSA ) ( FILLER_386 VSSA )
@ -22934,7 +22961,7 @@ NETS 995 ;
( bus_tie_59 VSSA ) ( bus_tie_58 VSSA ) ( bus_tie_57 VSSA )
( bus_tie_56 VSSA ) ( bus_tie_55 VSSA ) ( FILLER_327 VSSA )
( FILLER_326 VSSA ) ( FILLER_325 VSSA ) ( FILLER_324 VSSA )
( FILLER_323 VSSA ) ( clock_pad VSSA ) ( FILLER_321 VSSA )
( FILLER_323 VSSA ) ( gpio_pad VSSA ) ( FILLER_321 VSSA )
( FILLER_320 VSSA ) ( FILLER_319 VSSA ) ( FILLER_318 VSSA )
( FILLER_317 VSSA ) ( bus_tie_54 VSSA ) ( bus_tie_53 VSSA )
( bus_tie_52 VSSA ) ( bus_tie_51 VSSA ) ( bus_tie_50 VSSA )
@ -22969,34 +22996,35 @@ NETS 995 ;
( bus_tie_22 VSSA ) ( bus_tie_21 VSSA ) ( bus_tie_20 VSSA )
( bus_tie_19 VSSA ) ( FILLER_225 VSSA ) ( FILLER_224 VSSA )
( FILLER_223 VSSA ) ( FILLER_222 VSSA ) ( FILLER_221 VSSA )
( bus_tie_9 VSSA ) ( FILLER_219 VSSA ) ( FILLER_218 VSSA )
( clock_pad VSSA ) ( FILLER_219 VSSA ) ( FILLER_218 VSSA )
( FILLER_217 VSSA ) ( FILLER_216 VSSA ) ( bus_tie_18 VSSA )
( FILLER_215 VSSA ) ( bus_tie_17 VSSA ) ( bus_tie_16 VSSA )
( bus_tie_15 VSSA ) ( bus_tie_14 VSSA ) ( bus_tie_13 VSSA )
( FILLER_208 VSSA ) ( FILLER_207 VSSA ) ( FILLER_206 VSSA )
( FILLER_205 VSSA ) ( FILLER_204 VSSA ) ( resetb_pad VSSA )
( FILLER_202 VSSA ) ( FILLER_201 VSSA ) ( FILLER_200 VSSA )
( FILLER_199 VSSA ) ( FILLER_198 VSSA ) ( bus_tie_12 VSSA )
( bus_tie_11 VSSA ) ( bus_tie_10 VSSA ) ( bus_tie_8 VSSA )
( bus_tie_7 VSSA ) ( bus_tie_6 VSSA ) ( FILLER_191 VSSA )
( FILLER_190 VSSA ) ( FILLER_189 VSSA ) ( FILLER_188 VSSA )
( FILLER_187 VSSA ) ( mgmt_vssa_hvclamp_pad VSSA )
( FILLER_185 VSSA ) ( FILLER_184 VSSA ) ( FILLER_183 VSSA )
( FILLER_182 VSSA ) ( bus_tie_5 VSSA ) ( FILLER_181 VSSA )
( bus_tie_4 VSSA ) ( bus_tie_3 VSSA ) ( bus_tie_2 VSSA )
( bus_tie_1 VSSA ) ( FILLER_174 VSSA ) ( FILLER_173 VSSA )
( FILLER_172 VSSA ) ( FILLER_171 VSSA ) ( FILLER_170 VSSA )
( mgmt_corner\[0\] VSSA ) ;
- gpio_pad/VSSD ( gpio_pad VSSD ) ( FILLER_169 VSSD )
( FILLER_168 VSSD ) ( FILLER_167 VSSD ) ( FILLER_166 VSSD )
( FILLER_165 VSSD ) ( FILLER_164 VSSD ) ( FILLER_163 VSSD )
( FILLER_162 VSSD ) ( FILLER_161 VSSD ) ( FILLER_160 VSSD )
( FILLER_159 VSSD ) ( FILLER_158 VSSD ) ( FILLER_157 VSSD )
( mprj_pads.area1_io_pad\[15\] VSSD ) ( FILLER_155 VSSD )
( FILLER_154 VSSD ) ( FILLER_153 VSSD ) ( FILLER_152 VSSD )
( FILLER_151 VSSD ) ( FILLER_150 VSSD ) ( FILLER_149 VSSD )
( FILLER_148 VSSD ) ( FILLER_147 VSSD ) ( FILLER_146 VSSD )
( FILLER_145 VSSD ) ( FILLER_144 VSSD )
( FILLER_202 VSSA ) ( bus_tie_9 VSSA ) ( FILLER_201 VSSA )
( FILLER_200 VSSA ) ( FILLER_199 VSSA ) ( FILLER_198 VSSA )
( bus_tie_12 VSSA ) ( bus_tie_11 VSSA ) ( bus_tie_10 VSSA )
( bus_tie_8 VSSA ) ( bus_tie_7 VSSA ) ( bus_tie_6 VSSA )
( FILLER_191 VSSA ) ( FILLER_190 VSSA ) ( FILLER_189 VSSA )
( FILLER_188 VSSA ) ( FILLER_187 VSSA )
( mgmt_vssa_hvclamp_pad VSSA ) ( FILLER_185 VSSA )
( FILLER_184 VSSA ) ( FILLER_183 VSSA ) ( FILLER_182 VSSA )
( bus_tie_5 VSSA ) ( FILLER_181 VSSA ) ( bus_tie_4 VSSA )
( bus_tie_3 VSSA ) ( bus_tie_2 VSSA ) ( bus_tie_1 VSSA )
( FILLER_174 VSSA ) ( FILLER_173 VSSA ) ( FILLER_172 VSSA )
( FILLER_171 VSSA ) ( FILLER_170 VSSA )
( mgmt_corner\[0\] VSSA )
+ ROUTED met4 TAPERRULE met4_width_330 ( 663150 143430 ) ( 737850 * ) ;
- vssd ( FILLER_169 VSSD ) ( FILLER_168 VSSD ) ( FILLER_167 VSSD )
( FILLER_166 VSSD ) ( FILLER_165 VSSD ) ( FILLER_164 VSSD )
( FILLER_163 VSSD ) ( FILLER_162 VSSD ) ( FILLER_161 VSSD )
( FILLER_160 VSSD ) ( FILLER_159 VSSD ) ( FILLER_158 VSSD )
( FILLER_157 VSSD ) ( mprj_pads.area1_io_pad\[15\] VSSD )
( FILLER_155 VSSD ) ( FILLER_154 VSSD ) ( FILLER_153 VSSD )
( FILLER_152 VSSD ) ( FILLER_151 VSSD ) ( FILLER_150 VSSD )
( FILLER_149 VSSD ) ( FILLER_148 VSSD ) ( FILLER_147 VSSD )
( FILLER_146 VSSD ) ( FILLER_145 VSSD ) ( FILLER_144 VSSD )
( user1_vssa_hvclamp_pad\[0\] VSSD ) ( FILLER_142 VSSD )
( FILLER_141 VSSD ) ( FILLER_140 VSSD ) ( FILLER_139 VSSD )
( FILLER_138 VSSD ) ( FILLER_137 VSSD ) ( FILLER_136 VSSD )
@ -23237,7 +23265,7 @@ NETS 995 ;
( bus_tie_59 VSSD ) ( bus_tie_58 VSSD ) ( bus_tie_57 VSSD )
( bus_tie_56 VSSD ) ( bus_tie_55 VSSD ) ( FILLER_327 VSSD )
( FILLER_326 VSSD ) ( FILLER_325 VSSD ) ( FILLER_324 VSSD )
( FILLER_323 VSSD ) ( clock_pad VSSD ) ( FILLER_321 VSSD )
( FILLER_323 VSSD ) ( gpio_pad VSSD ) ( FILLER_321 VSSD )
( FILLER_320 VSSD ) ( FILLER_319 VSSD ) ( FILLER_318 VSSD )
( FILLER_317 VSSD ) ( bus_tie_54 VSSD ) ( bus_tie_53 VSSD )
( bus_tie_52 VSSD ) ( bus_tie_51 VSSD ) ( bus_tie_50 VSSD )
@ -23272,24 +23300,26 @@ NETS 995 ;
( bus_tie_22 VSSD ) ( bus_tie_21 VSSD ) ( bus_tie_20 VSSD )
( bus_tie_19 VSSD ) ( FILLER_225 VSSD ) ( FILLER_224 VSSD )
( FILLER_223 VSSD ) ( FILLER_222 VSSD ) ( FILLER_221 VSSD )
( bus_tie_9 VSSD ) ( FILLER_219 VSSD ) ( FILLER_218 VSSD )
( clock_pad VSSD ) ( FILLER_219 VSSD ) ( FILLER_218 VSSD )
( FILLER_217 VSSD ) ( FILLER_216 VSSD ) ( bus_tie_18 VSSD )
( FILLER_215 VSSD ) ( bus_tie_17 VSSD ) ( bus_tie_16 VSSD )
( bus_tie_15 VSSD ) ( bus_tie_14 VSSD ) ( bus_tie_13 VSSD )
( FILLER_208 VSSD ) ( FILLER_207 VSSD ) ( FILLER_206 VSSD )
( FILLER_205 VSSD ) ( FILLER_204 VSSD ) ( resetb_pad VSSD )
( FILLER_202 VSSD ) ( FILLER_201 VSSD ) ( FILLER_200 VSSD )
( FILLER_199 VSSD ) ( FILLER_198 VSSD ) ( bus_tie_12 VSSD )
( bus_tie_11 VSSD ) ( bus_tie_10 VSSD ) ( bus_tie_8 VSSD )
( bus_tie_7 VSSD ) ( bus_tie_6 VSSD ) ( FILLER_191 VSSD )
( FILLER_190 VSSD ) ( FILLER_189 VSSD ) ( FILLER_188 VSSD )
( FILLER_187 VSSD ) ( mgmt_vssa_hvclamp_pad VSSD )
( FILLER_185 VSSD ) ( FILLER_184 VSSD ) ( FILLER_183 VSSD )
( FILLER_182 VSSD ) ( bus_tie_5 VSSD ) ( FILLER_181 VSSD )
( bus_tie_4 VSSD ) ( bus_tie_3 VSSD ) ( bus_tie_2 VSSD )
( bus_tie_1 VSSD ) ( FILLER_174 VSSD ) ( FILLER_173 VSSD )
( FILLER_172 VSSD ) ( FILLER_171 VSSD ) ( FILLER_170 VSSD )
( mgmt_corner\[0\] VSSD ) ;
( FILLER_202 VSSD ) ( bus_tie_9 VSSD ) ( FILLER_201 VSSD )
( FILLER_200 VSSD ) ( FILLER_199 VSSD ) ( FILLER_198 VSSD )
( bus_tie_12 VSSD ) ( bus_tie_11 VSSD ) ( bus_tie_10 VSSD )
( bus_tie_8 VSSD ) ( bus_tie_7 VSSD ) ( bus_tie_6 VSSD )
( FILLER_191 VSSD ) ( FILLER_190 VSSD ) ( FILLER_189 VSSD )
( FILLER_188 VSSD ) ( FILLER_187 VSSD )
( mgmt_vssa_hvclamp_pad VSSD ) ( FILLER_185 VSSD )
( FILLER_184 VSSD ) ( FILLER_183 VSSD ) ( FILLER_182 VSSD )
( bus_tie_5 VSSD ) ( FILLER_181 VSSD ) ( bus_tie_4 VSSD )
( bus_tie_3 VSSD ) ( bus_tie_2 VSSD ) ( bus_tie_1 VSSD )
( FILLER_174 VSSD ) ( FILLER_173 VSSD ) ( FILLER_172 VSSD )
( FILLER_171 VSSD ) ( FILLER_170 VSSD )
( mgmt_corner\[0\] VSSD )
+ ROUTED met4 TAPERRULE met4_width_1270 ( 663635 153915 ) ( * 158265 ) ;
- vdda ( FILLER_402 VDDA ) ( FILLER_401 VDDA ) ( FILLER_400 VDDA )
( FILLER_399 VDDA ) ( FILLER_398 VDDA ) ( FILLER_397 VDDA )
( FILLER_396 VDDA ) ( FILLER_395 VDDA ) ( FILLER_394 VDDA )
@ -23376,16 +23406,15 @@ NETS 995 ;
( FILLER_171 VDDA ) ( FILLER_170 VDDA )
( mgmt_corner\[0\] VDDA )
+ ROUTED met4 TAPERRULE met4_width_960 ( 663480 181765 ) ( * 184915 ) ;
- gpio_pad/VCCD ( gpio_pad VCCD ) ( FILLER_169 VCCD )
( FILLER_168 VCCD ) ( FILLER_167 VCCD ) ( FILLER_166 VCCD )
( FILLER_165 VCCD ) ( FILLER_164 VCCD ) ( FILLER_163 VCCD )
( FILLER_162 VCCD ) ( FILLER_161 VCCD ) ( FILLER_160 VCCD )
( FILLER_159 VCCD ) ( FILLER_158 VCCD ) ( FILLER_157 VCCD )
( mprj_pads.area1_io_pad\[15\] VCCD ) ( FILLER_155 VCCD )
( FILLER_154 VCCD ) ( FILLER_153 VCCD ) ( FILLER_152 VCCD )
( FILLER_151 VCCD ) ( FILLER_150 VCCD ) ( FILLER_149 VCCD )
( FILLER_148 VCCD ) ( FILLER_147 VCCD ) ( FILLER_146 VCCD )
( FILLER_145 VCCD ) ( FILLER_144 VCCD )
- vccd ( FILLER_169 VCCD ) ( FILLER_168 VCCD ) ( FILLER_167 VCCD )
( FILLER_166 VCCD ) ( FILLER_165 VCCD ) ( FILLER_164 VCCD )
( FILLER_163 VCCD ) ( FILLER_162 VCCD ) ( FILLER_161 VCCD )
( FILLER_160 VCCD ) ( FILLER_159 VCCD ) ( FILLER_158 VCCD )
( FILLER_157 VCCD ) ( mprj_pads.area1_io_pad\[15\] VCCD )
( FILLER_155 VCCD ) ( FILLER_154 VCCD ) ( FILLER_153 VCCD )
( FILLER_152 VCCD ) ( FILLER_151 VCCD ) ( FILLER_150 VCCD )
( FILLER_149 VCCD ) ( FILLER_148 VCCD ) ( FILLER_147 VCCD )
( FILLER_146 VCCD ) ( FILLER_145 VCCD ) ( FILLER_144 VCCD )
( user1_vssa_hvclamp_pad\[0\] VCCD ) ( FILLER_142 VCCD )
( FILLER_141 VCCD ) ( FILLER_140 VCCD ) ( FILLER_139 VCCD )
( FILLER_138 VCCD ) ( FILLER_137 VCCD ) ( FILLER_136 VCCD )
@ -23694,18 +23723,18 @@ NETS 995 ;
( FILLER_698 VCCD ) ( user1_vssd_lvclamp_pad VCCHIB )
( FILLER_698 VCCHIB ) ( FILLER_476 VCCHIB ) ( FILLER_476 VCCD )
( FILLER_697 VCCD ) ( FILLER_697 VCCHIB ) ( FILLER_696 VCCD )
( FILLER_475 VCCHIB ) ( FILLER_475 VCCD ) ( FILLER_696 VCCHIB )
( FILLER_695 VCCD ) ( FILLER_695 VCCHIB ) ( FILLER_694 VCCD )
( FILLER_694 VCCHIB ) ( FILLER_693 VCCD ) ( FILLER_693 VCCHIB )
( user2_vssd_lvclamp_pad VCCHIB ) ( FILLER_473 VCCHIB )
( user2_vssd_lvclamp_pad VCCD ) ( FILLER_473 VCCD )
( FILLER_692 VCCD ) ( FILLER_692 VCCHIB ) ( FILLER_472 VCCHIB )
( FILLER_472 VCCD ) ( FILLER_471 VCCHIB ) ( FILLER_471 VCCD )
( FILLER_691 VCCD ) ( FILLER_691 VCCHIB ) ( FILLER_470 VCCHIB )
( FILLER_470 VCCD ) ( FILLER_690 VCCD ) ( FILLER_690 VCCHIB )
( FILLER_469 VCCHIB ) ( FILLER_469 VCCD ) ( FILLER_468 VCCHIB )
( FILLER_468 VCCD ) ( FILLER_467 VCCHIB ) ( FILLER_467 VCCD )
( FILLER_466 VCCHIB ) ( FILLER_466 VCCD )
( FILLER_475 VCCHIB ) ( gpio_pad VCCD ) ( FILLER_475 VCCD )
( FILLER_696 VCCHIB ) ( FILLER_695 VCCD ) ( FILLER_695 VCCHIB )
( FILLER_694 VCCD ) ( FILLER_694 VCCHIB ) ( FILLER_693 VCCD )
( FILLER_693 VCCHIB ) ( user2_vssd_lvclamp_pad VCCHIB )
( FILLER_473 VCCHIB ) ( user2_vssd_lvclamp_pad VCCD )
( FILLER_473 VCCD ) ( FILLER_692 VCCD ) ( FILLER_692 VCCHIB )
( FILLER_472 VCCHIB ) ( FILLER_472 VCCD ) ( FILLER_471 VCCHIB )
( FILLER_471 VCCD ) ( FILLER_691 VCCD ) ( FILLER_691 VCCHIB )
( FILLER_470 VCCHIB ) ( FILLER_470 VCCD ) ( FILLER_690 VCCD )
( FILLER_690 VCCHIB ) ( FILLER_469 VCCHIB ) ( FILLER_469 VCCD )
( FILLER_468 VCCHIB ) ( FILLER_468 VCCD ) ( FILLER_467 VCCHIB )
( FILLER_467 VCCD ) ( FILLER_466 VCCHIB ) ( FILLER_466 VCCD )
( user1_vssa_hvclamp_pad\[1\] VCCD ) ( FILLER_688 VCCD )
( user1_vssa_hvclamp_pad\[1\] VCCHIB ) ( FILLER_688 VCCHIB )
( FILLER_465 VCCHIB ) ( FILLER_465 VCCD ) ( FILLER_687 VCCD )
@ -24005,7 +24034,8 @@ NETS 995 ;
( bus_tie_2 VCCHIB ) ( bus_tie_1 VCCD ) ( bus_tie_1 VCCHIB )
( FILLER_174 VCCD ) ( FILLER_173 VCCD ) ( FILLER_172 VCCD )
( FILLER_171 VCCD ) ( FILLER_170 VCCD )
( mgmt_corner\[0\] VCCD ) ;
( mgmt_corner\[0\] VCCD )
+ ROUTED met4 TAPERRULE met4_width_1270 ( 192665 2278365 ) ( 197815 * ) ;
- gpio_pad/AMUXBUS_A ( gpio_pad AMUXBUS_A )
( FILLER_169 AMUXBUS_A ) ( FILLER_168 AMUXBUS_A )
( FILLER_167 AMUXBUS_A ) ( FILLER_166 AMUXBUS_A )
@ -25573,16 +25603,16 @@ NETS 995 ;
+ ROUTED met2 TAPERRULE met2_width_280 ( 2368385 4977105 ) ( * 4979365 ) ;
- mprj_pads.area1_io_pad\[17\]/IN_H
( mprj_pads.area1_io_pad\[17\] IN_H ) ;
- FILLER_99/VDDA ( FILLER_99 VDDA ) ( user1_corner VDDA )
( FILLER_169 VDDA ) ( FILLER_168 VDDA ) ( FILLER_167 VDDA )
( FILLER_166 VDDA ) ( FILLER_165 VDDA ) ( FILLER_164 VDDA )
( FILLER_163 VDDA ) ( FILLER_162 VDDA ) ( FILLER_161 VDDA )
( FILLER_160 VDDA ) ( FILLER_159 VDDA ) ( FILLER_158 VDDA )
( FILLER_157 VDDA ) ( mprj_pads.area1_io_pad\[15\] VDDA )
( FILLER_155 VDDA ) ( FILLER_154 VDDA ) ( FILLER_153 VDDA )
( FILLER_152 VDDA ) ( FILLER_151 VDDA ) ( FILLER_150 VDDA )
( FILLER_149 VDDA ) ( FILLER_148 VDDA ) ( FILLER_147 VDDA )
( FILLER_146 VDDA ) ( FILLER_145 VDDA ) ( FILLER_144 VDDA )
- vdda1 ( user1_corner VDDA ) ( FILLER_169 VDDA )
( FILLER_168 VDDA ) ( FILLER_167 VDDA ) ( FILLER_166 VDDA )
( FILLER_165 VDDA ) ( FILLER_164 VDDA ) ( FILLER_163 VDDA )
( FILLER_162 VDDA ) ( FILLER_161 VDDA ) ( FILLER_160 VDDA )
( FILLER_159 VDDA ) ( FILLER_158 VDDA ) ( FILLER_157 VDDA )
( mprj_pads.area1_io_pad\[15\] VDDA ) ( FILLER_155 VDDA )
( FILLER_154 VDDA ) ( FILLER_153 VDDA ) ( FILLER_152 VDDA )
( FILLER_151 VDDA ) ( FILLER_150 VDDA ) ( FILLER_149 VDDA )
( FILLER_148 VDDA ) ( FILLER_147 VDDA ) ( FILLER_146 VDDA )
( FILLER_145 VDDA ) ( FILLER_144 VDDA )
( user1_vssa_hvclamp_pad\[0\] VDDA ) ( FILLER_142 VDDA )
( FILLER_141 VDDA ) ( FILLER_140 VDDA ) ( FILLER_139 VDDA )
( FILLER_138 VDDA ) ( FILLER_137 VDDA ) ( FILLER_136 VDDA )
@ -25599,12 +25629,12 @@ NETS 995 ;
( FILLER_108 VDDA ) ( FILLER_107 VDDA ) ( FILLER_106 VDDA )
( FILLER_105 VDDA ) ( FILLER_104 VDDA ) ( FILLER_103 VDDA )
( FILLER_102 VDDA ) ( FILLER_101 VDDA ) ( FILLER_100 VDDA )
( FILLER_98 VDDA ) ( FILLER_96 VDDA )
( mprj_pads.area1_io_pad\[18\] VDDA ) ( FILLER_95 VDDA )
( FILLER_94 VDDA ) ( FILLER_93 VDDA ) ( FILLER_92 VDDA )
( FILLER_91 VDDA ) ( FILLER_90 VDDA ) ( FILLER_89 VDDA )
( FILLER_88 VDDA ) ( FILLER_87 VDDA ) ( FILLER_86 VDDA )
( FILLER_SB3 VDDA ) ( FILLER_SB1 VDDA ) ( FILLER_811 VDDA )
( FILLER_99 VDDA ) ( FILLER_98 VDDA )
( mprj_pads.area1_io_pad\[18\] VDDA ) ( FILLER_96 VDDA )
( FILLER_95 VDDA ) ( FILLER_94 VDDA ) ( FILLER_93 VDDA )
( FILLER_92 VDDA ) ( FILLER_91 VDDA ) ( FILLER_90 VDDA )
( FILLER_89 VDDA ) ( FILLER_88 VDDA ) ( FILLER_87 VDDA )
( FILLER_86 VDDA ) ( FILLER_SB3 VDDA ) ( FILLER_811 VDDA )
( FILLER_810 VDDA ) ( FILLER_809 VDDA ) ( FILLER_808 VDDA )
( FILLER_807 VDDA ) ( FILLER_806 VDDA ) ( FILLER_805 VDDA )
( FILLER_804 VDDA ) ( mprj_pads.area1_io_pad\[14\] VDDA )
@ -25648,9 +25678,9 @@ NETS 995 ;
( FILLER_704 VDDA ) ( FILLER_703 VDDA ) ( FILLER_702 VDDA )
( FILLER_701 VDDA ) ( FILLER_700 VDDA )
( user1_vssd_lvclamp_pad VDDA ) ( FILLER_698 VDDA )
( FILLER_697 VDDA ) ( FILLER_696 VDDA ) ( FILLER_695 VDDA )
( FILLER_694 VDDA ) ( FILLER_693 VDDA ) ( FILLER_692 VDDA )
( FILLER_691 VDDA ) ( FILLER_690 VDDA )
( FILLER_SB1 VDDA ) ( FILLER_697 VDDA ) ( FILLER_696 VDDA )
( FILLER_695 VDDA ) ( FILLER_694 VDDA ) ( FILLER_693 VDDA )
( FILLER_692 VDDA ) ( FILLER_691 VDDA ) ( FILLER_690 VDDA )
( user1_vssa_hvclamp_pad\[1\] VDDA ) ( FILLER_688 VDDA )
( FILLER_687 VDDA ) ( FILLER_686 VDDA ) ( FILLER_685 VDDA )
( FILLER_684 VDDA ) ( FILLER_683 VDDA ) ( FILLER_682 VDDA )
@ -25678,17 +25708,18 @@ NETS 995 ;
( mprj_pads.area1_io_pad\[0\] VDDA ) ( FILLER_624 VDDA )
( FILLER_622 VDDA ) ( FILLER_621 VDDA ) ( FILLER_620 VDDA )
( FILLER_619 VDDA ) ( FILLER_618 VDDA ) ( FILLER_617 VDDA )
( FILLER_616 VDDA ) ( FILLER_615 VDDA ) ;
- FILLER_99/VSSA ( FILLER_99 VSSA ) ( user1_corner VSSA )
( FILLER_169 VSSA ) ( FILLER_168 VSSA ) ( FILLER_167 VSSA )
( FILLER_166 VSSA ) ( FILLER_165 VSSA ) ( FILLER_164 VSSA )
( FILLER_163 VSSA ) ( FILLER_162 VSSA ) ( FILLER_161 VSSA )
( FILLER_160 VSSA ) ( FILLER_159 VSSA ) ( FILLER_158 VSSA )
( FILLER_157 VSSA ) ( mprj_pads.area1_io_pad\[15\] VSSA )
( FILLER_155 VSSA ) ( FILLER_154 VSSA ) ( FILLER_153 VSSA )
( FILLER_152 VSSA ) ( FILLER_151 VSSA ) ( FILLER_150 VSSA )
( FILLER_149 VSSA ) ( FILLER_148 VSSA ) ( FILLER_147 VSSA )
( FILLER_146 VSSA ) ( FILLER_145 VSSA ) ( FILLER_144 VSSA )
( FILLER_616 VDDA ) ( FILLER_615 VDDA )
+ ROUTED met4 TAPERRULE met4_width_965 ( 3403085 2299482.5 ) ( 3406235 * ) ;
- vssa1 ( user1_corner VSSA ) ( FILLER_169 VSSA )
( FILLER_168 VSSA ) ( FILLER_167 VSSA ) ( FILLER_166 VSSA )
( FILLER_165 VSSA ) ( FILLER_164 VSSA ) ( FILLER_163 VSSA )
( FILLER_162 VSSA ) ( FILLER_161 VSSA ) ( FILLER_160 VSSA )
( FILLER_159 VSSA ) ( FILLER_158 VSSA ) ( FILLER_157 VSSA )
( mprj_pads.area1_io_pad\[15\] VSSA ) ( FILLER_155 VSSA )
( FILLER_154 VSSA ) ( FILLER_153 VSSA ) ( FILLER_152 VSSA )
( FILLER_151 VSSA ) ( FILLER_150 VSSA ) ( FILLER_149 VSSA )
( FILLER_148 VSSA ) ( FILLER_147 VSSA ) ( FILLER_146 VSSA )
( FILLER_145 VSSA ) ( FILLER_144 VSSA )
( user1_vssa_hvclamp_pad\[0\] VSSA ) ( FILLER_142 VSSA )
( FILLER_141 VSSA ) ( FILLER_140 VSSA ) ( FILLER_139 VSSA )
( FILLER_138 VSSA ) ( FILLER_137 VSSA ) ( FILLER_136 VSSA )
@ -25705,12 +25736,12 @@ NETS 995 ;
( FILLER_108 VSSA ) ( FILLER_107 VSSA ) ( FILLER_106 VSSA )
( FILLER_105 VSSA ) ( FILLER_104 VSSA ) ( FILLER_103 VSSA )
( FILLER_102 VSSA ) ( FILLER_101 VSSA ) ( FILLER_100 VSSA )
( FILLER_98 VSSA ) ( FILLER_96 VSSA )
( mprj_pads.area1_io_pad\[18\] VSSA ) ( FILLER_95 VSSA )
( FILLER_94 VSSA ) ( FILLER_93 VSSA ) ( FILLER_92 VSSA )
( FILLER_91 VSSA ) ( FILLER_90 VSSA ) ( FILLER_89 VSSA )
( FILLER_88 VSSA ) ( FILLER_87 VSSA ) ( FILLER_86 VSSA )
( FILLER_SB3 VSSA ) ( FILLER_SB1 VSSA ) ( FILLER_811 VSSA )
( FILLER_99 VSSA ) ( FILLER_98 VSSA )
( mprj_pads.area1_io_pad\[18\] VSSA ) ( FILLER_96 VSSA )
( FILLER_95 VSSA ) ( FILLER_94 VSSA ) ( FILLER_93 VSSA )
( FILLER_92 VSSA ) ( FILLER_91 VSSA ) ( FILLER_90 VSSA )
( FILLER_89 VSSA ) ( FILLER_88 VSSA ) ( FILLER_87 VSSA )
( FILLER_86 VSSA ) ( FILLER_SB3 VSSA ) ( FILLER_811 VSSA )
( FILLER_810 VSSA ) ( FILLER_809 VSSA ) ( FILLER_808 VSSA )
( FILLER_807 VSSA ) ( FILLER_806 VSSA ) ( FILLER_805 VSSA )
( FILLER_804 VSSA ) ( mprj_pads.area1_io_pad\[14\] VSSA )
@ -25753,10 +25784,10 @@ NETS 995 ;
( FILLER_707 VSSA ) ( FILLER_706 VSSA ) ( FILLER_705 VSSA )
( FILLER_704 VSSA ) ( FILLER_703 VSSA ) ( FILLER_702 VSSA )
( FILLER_701 VSSA ) ( FILLER_700 VSSA )
( user1_vssd_lvclamp_pad VSSA ) ( FILLER_698 VSSA )
( FILLER_697 VSSA ) ( FILLER_696 VSSA ) ( FILLER_695 VSSA )
( FILLER_694 VSSA ) ( FILLER_693 VSSA ) ( FILLER_692 VSSA )
( FILLER_691 VSSA ) ( FILLER_690 VSSA )
( user1_vssd_lvclamp_pad VSSA ) ( FILLER_SB1 VSSA )
( FILLER_698 VSSA ) ( FILLER_697 VSSA ) ( FILLER_696 VSSA )
( FILLER_695 VSSA ) ( FILLER_694 VSSA ) ( FILLER_693 VSSA )
( FILLER_692 VSSA ) ( FILLER_691 VSSA ) ( FILLER_690 VSSA )
( user1_vssa_hvclamp_pad\[1\] VSSA ) ( FILLER_688 VSSA )
( FILLER_687 VSSA ) ( FILLER_686 VSSA ) ( FILLER_685 VSSA )
( FILLER_684 VSSA ) ( FILLER_683 VSSA ) ( FILLER_682 VSSA )
@ -25784,7 +25815,8 @@ NETS 995 ;
( mprj_pads.area1_io_pad\[0\] VSSA ) ( FILLER_624 VSSA )
( FILLER_622 VSSA ) ( FILLER_621 VSSA ) ( FILLER_620 VSSA )
( FILLER_619 VSSA ) ( FILLER_618 VSSA ) ( FILLER_617 VSSA )
( FILLER_616 VSSA ) ( FILLER_615 VSSA ) ;
( FILLER_616 VSSA ) ( FILLER_615 VSSA )
+ ROUTED met4 TAPERRULE met4_width_330 ( 3444570 2299150 ) ( * 2373850 ) ;
- mprj_io[2] ( mprj_pads.area1_io_pad\[2\] PAD )
+ ROUTED met5 TAPERRULE met5_width_62450 ( 3523785 958000 ) ( * 1019000 ) ;
- mprj_pads.area1_io_pad\[2\]/TIE_LO_ESD
@ -28012,11 +28044,11 @@ NETS 995 ;
+ ROUTED met5 TAPERRULE met5_width_60820 ( 401910 64465 ) ( 461150 * ) ;
- vccd2_pad ( user2_vccd_lvclamp_pad VCCD_PAD )
+ ROUTED met5 TAPERRULE met5_width_54400 ( 31635 4597470 ) ( 97295 * ) ;
- gpio_pad/VSSIO ( gpio_pad VSSIO ) ( FILLER_169 VSSIO )
( FILLER_168 VSSIO ) ( FILLER_167 VSSIO ) ( FILLER_166 VSSIO )
( FILLER_165 VSSIO ) ( FILLER_164 VSSIO ) ( FILLER_163 VSSIO )
( FILLER_162 VSSIO ) ( FILLER_161 VSSIO ) ( FILLER_160 VSSIO )
( FILLER_159 VSSIO ) ( FILLER_158 VSSIO ) ( FILLER_157 VSSIO )
- vssio ( FILLER_169 VSSIO ) ( FILLER_168 VSSIO )
( FILLER_167 VSSIO ) ( FILLER_166 VSSIO ) ( FILLER_165 VSSIO )
( FILLER_164 VSSIO ) ( FILLER_163 VSSIO ) ( FILLER_162 VSSIO )
( FILLER_161 VSSIO ) ( FILLER_160 VSSIO ) ( FILLER_159 VSSIO )
( FILLER_158 VSSIO ) ( FILLER_157 VSSIO )
( mprj_pads.area1_io_pad\[15\] VSSIO ) ( FILLER_155 VSSIO )
( FILLER_154 VSSIO ) ( FILLER_153 VSSIO ) ( FILLER_152 VSSIO )
( FILLER_151 VSSIO ) ( FILLER_150 VSSIO ) ( FILLER_149 VSSIO )
@ -28169,15 +28201,15 @@ NETS 995 ;
( FILLER_479 VSSIO ) ( FILLER_478 VSSIO ) ( FILLER_477 VSSIO )
( user1_vssd_lvclamp_pad VSSIO ) ( FILLER_698 VSSIO )
( FILLER_476 VSSIO ) ( FILLER_697 VSSIO ) ( FILLER_696 VSSIO )
( FILLER_475 VSSIO ) ( FILLER_695 VSSIO ) ( FILLER_694 VSSIO )
( FILLER_693 VSSIO ) ( user2_vssd_lvclamp_pad VSSIO )
( FILLER_473 VSSIO ) ( FILLER_692 VSSIO ) ( FILLER_472 VSSIO )
( FILLER_471 VSSIO ) ( FILLER_691 VSSIO ) ( FILLER_470 VSSIO )
( FILLER_690 VSSIO ) ( FILLER_469 VSSIO ) ( FILLER_468 VSSIO )
( FILLER_467 VSSIO ) ( FILLER_466 VSSIO )
( user1_vssa_hvclamp_pad\[1\] VSSIO ) ( FILLER_688 VSSIO )
( FILLER_465 VSSIO ) ( FILLER_687 VSSIO ) ( FILLER_686 VSSIO )
( FILLER_685 VSSIO ) ( FILLER_684 VSSIO )
( FILLER_475 VSSIO ) ( gpio_pad VSSIO ) ( FILLER_695 VSSIO )
( FILLER_694 VSSIO ) ( FILLER_693 VSSIO )
( user2_vssd_lvclamp_pad VSSIO ) ( FILLER_473 VSSIO )
( FILLER_692 VSSIO ) ( FILLER_472 VSSIO ) ( FILLER_471 VSSIO )
( FILLER_691 VSSIO ) ( FILLER_470 VSSIO ) ( FILLER_690 VSSIO )
( FILLER_469 VSSIO ) ( FILLER_468 VSSIO ) ( FILLER_467 VSSIO )
( FILLER_466 VSSIO ) ( user1_vssa_hvclamp_pad\[1\] VSSIO )
( FILLER_688 VSSIO ) ( FILLER_465 VSSIO ) ( FILLER_687 VSSIO )
( FILLER_686 VSSIO ) ( FILLER_685 VSSIO ) ( FILLER_684 VSSIO )
( mprj_pads.area2_io_pad\[13\] VSSIO ) ( FILLER_463 VSSIO )
( FILLER_462 VSSIO ) ( FILLER_683 VSSIO ) ( FILLER_461 VSSIO )
( FILLER_682 VSSIO ) ( FILLER_460 VSSIO ) ( FILLER_681 VSSIO )
@ -28312,12 +28344,47 @@ NETS 995 ;
( FILLER_198 VSSIO ) ( bus_tie_12 VSSIO ) ( bus_tie_11 VSSIO )
( bus_tie_10 VSSIO ) ( bus_tie_8 VSSIO ) ( bus_tie_7 VSSIO )
( FILLER_191 VSSIO ) ( FILLER_190 VSSIO ) ( FILLER_189 VSSIO )
( FILLER_188 VSSIO ) ( FILLER_187 VSSIO ) ;
( FILLER_188 VSSIO ) ( FILLER_187 VSSIO )
+ ROUTED met4 TAPERRULE met4_width_2245 ( 150 2279347.5 ) ( 24065 * ) ;
- vssd_pad ( mgmt_vssd_lvclamp_pad VSSD_PAD )
+ ROUTED met5 TAPERRULE met5_width_54400 ( 1243530 31635 ) ( * 97295 ) ;
- vdda1_pad ( user1_vdda_hvclamp_pad\[0\] VDDA_PAD )
+ ROUTED met5 TAPERRULE met5_width_60820 ( 3523530 4099910 ) ( * 4159150 ) ;
- mprj_io[16] ( mprj_pads.area1_io_pad\[16\] PAD ) ;
- mprj_io[16] ( mprj_pads.area1_io_pad\[16\] PAD )
+ ROUTED met5 TAPERRULE met5_width_13000 ( 3376600 4612670 ) ( * 4962770 )
NEW met5 TAPERRULE met5_width_13000 ( 3376600 4562410 ) ( * 4588310 )
NEW met4 TAPERRULE met4_width_560 ( 3370200 4612150 ) ( 3382930 * )
NEW met4 TAPERRULE met4_width_600 ( 3382780 4589260 ) ( * 4611720 )
NEW met4 TAPERRULE met4_width_530 ( 3370200 4588845 ) ( 3382930 * )
NEW met4 TAPERRULE met4_width_630 ( 3370365 4589260 ) ( * 4611720 )
NEW met4 ( 3376580 4600490 ) via4_11800_22760
NEW met3 TAPERRULE met3_width_630 ( 3354010 4612185 ) ( 3383470 * )
NEW met3 TAPERRULE met3_width_1140 ( 3383050 4589260 ) ( * 4611720 )
NEW met3 TAPERRULE met3_width_610 ( 3354010 4588805 ) ( 3383470 * )
NEW met3 TAPERRULE met3_width_16820 ( 3362270 4589260 ) ( * 4611720 )
NEW met3 ( 3376580 4600490 ) via3_11800_22760_hx
NEW met5 TAPERRULE met5_width_13000 ( 3376600 2348200 ) ( * 4538150 )
NEW met4 TAPERRULE met4_width_590 ( 3370230 4561905 ) ( 3382960 * )
NEW met4 TAPERRULE met4_width_590 ( 3382815 4539100 ) ( * 4561460 )
NEW met4 TAPERRULE met4_width_600 ( 3370230 4538650 ) ( 3382960 * )
NEW met4 TAPERRULE met4_width_770 ( 3370465 4539100 ) ( * 4561460 )
NEW met4 ( 3376685 4550280 ) via4_11670_22660
NEW met3 TAPERRULE met3_width_635 ( 3354010 4561927.5 ) ( 3383470 * )
NEW met3 TAPERRULE met3_width_1100 ( 3383070 4539100 ) ( * 4561460 )
NEW met3 TAPERRULE met3_width_650 ( 3354010 4538625 ) ( 3383470 * )
NEW met3 TAPERRULE met3_width_16990 ( 3362355 4539100 ) ( * 4561460 )
NEW met3 ( 3376685 4550280 ) via3_11670_22660_hx
NEW met5 TAPERRULE met5_width_13000 ( 3376600 476580 ) ( * 2324490 )
NEW met4 TAPERRULE met4_width_550 ( 3370270 2347675 ) ( 3382940 * )
NEW met4 TAPERRULE met4_width_530 ( 3382825 2325440 ) ( * 2347250 )
NEW met4 TAPERRULE met4_width_520 ( 3370270 2325030 ) ( 3382940 * )
NEW met4 TAPERRULE met4_width_600 ( 3370420 2325440 ) ( * 2347250 )
NEW met4 ( 3376640 2336345 ) via4_11840_22110
NEW met3 TAPERRULE met3_width_600 ( 3354120 2347700 ) ( 3384240 * )
NEW met3 TAPERRULE met3_width_1830 ( 3383475 2325440 ) ( * 2347250 )
NEW met3 TAPERRULE met3_width_545 ( 3354120 2325017.5 ) ( 3384240 * )
NEW met3 TAPERRULE met3_width_16750 ( 3362345 2325440 ) ( * 2347250 )
NEW met3 ( 3376640 2336345 ) via3_11840_22110_hx ;
- mprj_io_in[16] ( mprj_pads.area1_io_pad\[16\] IN )
+ ROUTED met2 TAPERRULE met2_width_280 ( 2696225 4977105 ) ( * 4979365 ) ;
- mprj_io_one[16] ( mprj_pads.area1_io_pad\[16\] ENABLE_VDDIO )

4230
def/chip_io_alt.def
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BIN
gds/chip_io.gds.gz
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BIN
gds/chip_io_alt.gds.gz
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69
lef/chip_io.lef
View File

@ -5809,6 +5809,48 @@ MACRO chip_io
RECT 725.455 199.670 725.715 200.000 ;
END
END porb_h
PIN vccd
PORT
LAYER met4 ;
RECT 192.515 2277.730 197.965 2416.270 ;
END
END vccd
PIN vdda1
PORT
LAYER met4 ;
RECT 3402.935 2152.035 3406.385 2299.965 ;
END
END vdda1
PIN vddio
PORT
LAYER met4 ;
RECT 164.665 2277.730 168.115 2416.270 ;
END
END vddio
PIN vssa
PORT
LAYER met4 ;
RECT 467.730 143.265 964.910 143.595 ;
END
END vssa
PIN vssa1
PORT
LAYER met4 ;
RECT 3444.405 2151.730 3444.735 2771.910 ;
END
END vssa1
PIN vssd
PORT
LAYER met4 ;
RECT 467.730 153.765 664.270 158.415 ;
END
END vssd
PIN vssio
PORT
LAYER met4 ;
RECT 0.000 2278.225 24.215 2280.470 ;
END
END vssio
OBS
LAYER nwell ;
RECT 1678.860 4988.685 1737.965 4990.205 ;
@ -14212,9 +14254,6 @@ MACRO chip_io
LAYER met4 ;
RECT 24.615 2415.965 104.600 2416.670 ;
RECT 0.000 2280.470 24.215 2415.000 ;
LAYER met4 ;
RECT 0.000 2278.225 24.215 2280.470 ;
LAYER met4 ;
RECT 24.615 2277.825 104.600 2279.000 ;
RECT 0.000 2277.330 104.600 2277.825 ;
LAYER met4 ;
@ -14594,11 +14633,8 @@ MACRO chip_io
RECT 159.815 2277.730 163.265 2416.270 ;
LAYER met4 ;
RECT 163.665 2415.965 164.265 2416.670 ;
RECT 163.665 2277.330 164.265 2279.000 ;
LAYER met4 ;
RECT 164.665 2277.730 168.115 2416.270 ;
LAYER met4 ;
RECT 168.515 2415.965 169.115 2416.670 ;
RECT 163.665 2277.330 164.265 2279.000 ;
RECT 168.515 2277.330 169.115 2279.000 ;
LAYER met4 ;
RECT 169.515 2277.730 174.165 2416.270 ;
@ -14617,10 +14653,7 @@ MACRO chip_io
RECT 186.465 2277.730 191.115 2416.270 ;
LAYER met4 ;
RECT 191.515 2415.965 192.115 2416.670 ;
RECT 180.615 2277.330 186.065 2277.635 ;
RECT 191.515 2277.330 192.115 2279.000 ;
LAYER met4 ;
RECT 192.515 2277.730 197.965 2416.270 ;
RECT 3390.035 2372.730 3395.485 2520.270 ;
LAYER met4 ;
RECT 3395.885 2519.965 3396.485 2520.670 ;
@ -14663,6 +14696,8 @@ MACRO chip_io
RECT 3434.635 2519.965 3435.335 2520.670 ;
RECT 3434.635 2372.330 3435.335 2373.035 ;
RECT 3390.035 2300.670 3435.335 2372.330 ;
RECT 180.615 2277.330 186.065 2277.635 ;
RECT 191.515 2277.330 192.115 2279.000 ;
RECT 152.665 2205.670 197.965 2277.330 ;
RECT 152.665 2204.965 153.365 2205.670 ;
RECT 152.665 2066.330 153.365 2066.970 ;
@ -14714,9 +14749,6 @@ MACRO chip_io
RECT 3396.885 2151.730 3401.535 2300.270 ;
LAYER met4 ;
RECT 3401.935 2299.000 3402.535 2300.365 ;
LAYER met4 ;
RECT 3402.935 2152.035 3406.385 2299.965 ;
LAYER met4 ;
RECT 3406.785 2299.000 3407.385 2300.365 ;
RECT 3401.935 2151.635 3402.535 2152.035 ;
RECT 3406.785 2151.635 3407.385 2152.035 ;
@ -15135,9 +15167,6 @@ MACRO chip_io
RECT 3441.125 1896.560 3444.105 2780.240 ;
LAYER met4 ;
RECT 3444.505 2772.310 3588.000 2780.640 ;
LAYER met4 ;
RECT 3444.405 2151.730 3444.735 2771.910 ;
LAYER met4 ;
RECT 3445.135 2740.670 3588.000 2772.310 ;
RECT 3445.135 2740.030 3445.835 2740.670 ;
RECT 3445.135 2594.000 3445.835 2739.000 ;
@ -16947,9 +16976,6 @@ MACRO chip_io
RECT 198.525 153.765 395.270 158.415 ;
LAYER met4 ;
RECT 395.670 153.365 467.330 158.815 ;
LAYER met4 ;
RECT 467.730 153.765 664.270 158.415 ;
LAYER met4 ;
RECT 664.670 153.365 736.330 158.815 ;
LAYER met4 ;
RECT 736.730 153.765 933.270 158.415 ;
@ -17074,10 +17100,6 @@ MACRO chip_io
LAYER met4 ;
RECT 177.090 143.895 973.240 146.875 ;
RECT 176.825 143.265 395.270 143.595 ;
LAYER met4 ;
RECT 395.670 142.865 467.330 143.495 ;
LAYER met4 ;
RECT 467.730 143.265 964.910 143.595 ;
LAYER met4 ;
RECT 973.640 143.495 975.160 147.275 ;
LAYER met4 ;
@ -17103,6 +17125,7 @@ MACRO chip_io
LAYER met4 ;
RECT 975.560 143.895 1516.240 146.875 ;
LAYER met4 ;
RECT 395.670 142.865 467.330 143.495 ;
RECT 965.310 142.865 1008.990 143.495 ;
LAYER met4 ;
RECT 1009.390 143.265 1507.910 143.595 ;

51
lef/chip_io_alt.lef
View File

@ -4865,6 +4865,36 @@ MACRO chip_io_alt
RECT 2624.855 208.565 2625.135 211.130 ;
END
END gpio_mode1_core
PIN vccd
PORT
LAYER met4 ;
RECT 192.515 2277.730 197.965 2416.270 ;
END
END vccd
PIN vddio
PORT
LAYER met4 ;
RECT 164.665 2277.730 168.115 2416.270 ;
END
END vddio
PIN vssa
PORT
LAYER met4 ;
RECT 467.730 143.265 964.910 143.595 ;
END
END vssa
PIN vssd
PORT
LAYER met4 ;
RECT 467.730 153.765 664.270 158.415 ;
END
END vssd
PIN vssio
PORT
LAYER met4 ;
RECT 0.000 2278.225 24.215 2280.470 ;
END
END vssio
OBS
LAYER pwell ;
RECT 1155.495 4988.935 1163.285 5011.790 ;
@ -12354,9 +12384,6 @@ MACRO chip_io_alt
LAYER met4 ;
RECT 24.615 2415.965 104.600 2416.670 ;
RECT 0.000 2280.470 24.215 2415.000 ;
LAYER met4 ;
RECT 0.000 2278.225 24.215 2280.470 ;
LAYER met4 ;
RECT 24.615 2277.825 104.600 2279.000 ;
RECT 0.000 2277.330 104.600 2277.825 ;
LAYER met4 ;
@ -12736,11 +12763,8 @@ MACRO chip_io_alt
RECT 159.815 2277.730 163.265 2416.270 ;
LAYER met4 ;
RECT 163.665 2415.965 164.265 2416.670 ;
RECT 163.665 2277.330 164.265 2279.000 ;
LAYER met4 ;
RECT 164.665 2277.730 168.115 2416.270 ;
LAYER met4 ;
RECT 168.515 2415.965 169.115 2416.670 ;
RECT 163.665 2277.330 164.265 2279.000 ;
RECT 168.515 2277.330 169.115 2279.000 ;
LAYER met4 ;
RECT 169.515 2277.730 174.165 2416.270 ;
@ -12759,10 +12783,7 @@ MACRO chip_io_alt
RECT 186.465 2277.730 191.115 2416.270 ;
LAYER met4 ;
RECT 191.515 2415.965 192.115 2416.670 ;
RECT 180.615 2277.330 186.065 2277.635 ;
RECT 191.515 2277.330 192.115 2279.000 ;
LAYER met4 ;
RECT 192.515 2277.730 197.965 2416.270 ;
RECT 3390.035 2372.730 3395.485 2520.270 ;
LAYER met4 ;
RECT 3395.885 2519.965 3396.485 2520.670 ;
@ -12805,6 +12826,8 @@ MACRO chip_io_alt
RECT 3434.635 2519.965 3435.335 2520.670 ;
RECT 3434.635 2372.330 3435.335 2373.035 ;
RECT 3390.035 2300.670 3435.335 2372.330 ;
RECT 180.615 2277.330 186.065 2277.635 ;
RECT 191.515 2277.330 192.115 2279.000 ;
RECT 152.665 2205.670 197.965 2277.330 ;
RECT 152.665 2204.965 153.365 2205.670 ;
RECT 152.665 2066.330 153.365 2066.970 ;
@ -15079,9 +15102,6 @@ MACRO chip_io_alt
RECT 198.525 153.765 395.270 158.415 ;
LAYER met4 ;
RECT 395.670 153.365 467.330 158.815 ;
LAYER met4 ;
RECT 467.730 153.765 664.270 158.415 ;
LAYER met4 ;
RECT 664.670 153.365 736.330 158.815 ;
LAYER met4 ;
RECT 736.730 153.765 933.270 158.415 ;
@ -15206,10 +15226,6 @@ MACRO chip_io_alt
LAYER met4 ;
RECT 177.090 143.895 973.240 146.875 ;
RECT 176.825 143.265 395.270 143.595 ;
LAYER met4 ;
RECT 395.670 142.865 467.330 143.495 ;
LAYER met4 ;
RECT 467.730 143.265 964.910 143.595 ;
LAYER met4 ;
RECT 973.640 143.495 975.160 147.275 ;
LAYER met4 ;
@ -15235,6 +15251,7 @@ MACRO chip_io_alt
LAYER met4 ;
RECT 975.560 143.895 1516.240 146.875 ;
LAYER met4 ;
RECT 395.670 142.865 467.330 143.495 ;
RECT 965.310 142.865 1008.990 143.495 ;
LAYER met4 ;
RECT 1009.390 143.265 1507.910 143.595 ;

23
mag/chip_io.mag
View File

@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
timestamp 1665336875
timestamp 1665500183
<< metal1 >>
rect 41866 995682 675734 995734
rect 41866 42225 41918 995682
@ -1638,8 +1638,13 @@ rect 670826 464548 673426 464648
rect 670826 460030 670932 464548
rect 673300 460030 673426 464548
rect 670826 459864 673426 460030
rect 680587 459800 681277 459993
rect 688881 459800 688947 474800
rect 0 455645 4843 456094
rect 28653 440800 28719 455800
rect 32933 455546 33623 455800
rect 36323 455607 37013 455799
rect 38503 455546 39593 455800
rect 41008 455654 43618 455758
rect 41008 451042 41142 455654
rect 43508 451042 43618 455654
@ -1709,6 +1714,8 @@ rect 533234 39717 533245 40043
rect 533402 39717 533414 40043
rect 533234 39704 533414 39717
rect 132600 36323 132792 37013
rect 132600 30753 132854 31683
rect 132600 28653 147600 28719
<< via4 >>
rect 44294 922268 46702 926876
rect 41096 917280 43504 921736
@ -6638,6 +6645,20 @@ rlabel metal3 140494 40183 140494 40183 1 xresloop
rlabel metal1 142538 40100 142538 40100 1 xres_vss_loop
flabel metal2 308255 41713 308311 42193 0 FreeSans 320 90 0 0 porb_h
port 700 nsew
flabel metal4 38503 455546 39593 455800 0 FreeSans 320 0 0 0 vccd
port 701 nsew
flabel metal4 680587 459800 681277 459993 0 FreeSans 320 0 0 0 vdda1
port 702 nsew
flabel metal4 32933 455546 33623 455800 0 FreeSans 320 0 0 0 vddio
port 703 nsew
flabel metal4 132600 28653 147600 28719 0 FreeSans 320 0 0 0 vssa
port 704 nsew
flabel metal4 688881 459800 688947 474800 0 FreeSans 320 0 0 0 vssa1
port 705 nsew
flabel metal4 132600 30753 132854 31683 0 FreeSans 320 0 0 0 vssd
port 706 nsew
flabel metal4 0 455645 4843 456094 0 FreeSans 320 0 0 0 vssio
port 707 nsew
<< properties >>
string FIXED_BBOX 0 0 717600 1037600
<< end >>

17
mag/chip_io_alt.mag
View File

@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
timestamp 1665337263
timestamp 1665500648
<< metal1 >>
rect 41866 42181 41918 784786
rect 411070 42422 411076 42474
@ -1535,8 +1535,11 @@ rect 673300 460006 673420 464530
rect 670818 459860 673420 460006
rect 680587 459800 681277 459992
rect 688881 459800 688947 474800
rect 0 455645 4843 456094
rect 28653 440800 28719 455800
rect 32933 455546 33623 455800
rect 36323 455607 37013 455799
rect 38503 455546 39593 455800
rect 40998 455628 43584 455724
rect 40998 451068 41108 455628
rect 43494 451068 43584 455628
@ -1606,6 +1609,8 @@ rect 533234 39692 533244 40010
rect 533404 39692 533414 40010
rect 533234 39682 533414 39692
rect 132600 36323 132792 37013
rect 132600 30753 132854 31683
rect 132600 28653 147600 28719
<< via4 >>
rect 44296 922264 46674 926816
rect 41102 917302 43472 921722
@ -6183,6 +6188,16 @@ flabel metal2 41713 195421 42193 195477 0 FreeSans 320 0 0 0 mprj_io_one[26]
port 590 nsew
flabel metal2 308255 41746 308311 42226 0 FreeSans 320 90 0 0 porb_h
port 591 nsew signal input
flabel metal4 38503 455546 39593 455800 0 FreeSans 320 0 0 0 vccd
port 593 nsew
flabel metal4 32933 455546 33623 455800 0 FreeSans 320 0 0 0 vddio
port 594 nsew
flabel metal4 132600 28653 147600 28719 0 FreeSans 320 0 0 0 vssa
port 595 nsew
flabel metal4 132600 30753 132854 31683 0 FreeSans 320 0 0 0 vssd
port 596 nsew
flabel metal4 0 455645 4843 456094 0 FreeSans 320 0 0 0 vssio
port 597 nsew
<< properties >>
string FIXED_BBOX 0 0 717600 1037600
<< end >>

107
scripts/chip_io_prep.sh Executable file
View File

@ -0,0 +1,107 @@
#!/bin/bash
#-------------------------------------------------------------------
# chip_io_prep.sh --
#
# Prepare the GDS, LEF, and DEF views of chip_io and chip_io_alt
# (the caravel and caravan padframes)
#
# Run this from the caravel/mag/ directory after modifying the
# magic layout.
#
# Written by Tim Edwards for MPW-7 10/11/2022
#-------------------------------------------------------------------
echo ${PDK_ROOT:=/usr/share/pdk} > /dev/null
echo ${PDK:=sky130A} > /dev/null
# Generate DEF of chip_io
echo "Generating DEF view of chip_io"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io
property flatten true
flatten -doproperty chip_io_flat
load chip_io_flat
cellname delete chip_io
cellname rename chip_io_flat chip_io
select top cell
extract do local
extract no all
extract all
def write chip_io
quit -noprompt
EOF
rm *.ext
# Generate DEF of chip_io_alt
echo "Generating DEF view of chip_io_alt"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io_alt
property flatten true
flatten -doproperty chip_io_alt_flat
load chip_io_alt_flat
cellname delete chip_io_alt
cellname rename chip_io_alt_flat chip_io_alt
select top cell
extract do local
extract no all
extract all
def write chip_io_alt
quit -noprompt
EOF
rm *.ext
# Generate GDS of chip_io
echo "Generating GDS view of chip_io"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io -dereference
gds compress 9
cif *hier write disable
cif *array write disable
gds write chip_io
quit -noprompt
EOF
# Generate GDS of chip_io_alt
echo "Generating GDS view of chip_io_alt"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io_alt -dereference
gds compress 9
cif *hier write disable
cif *array write disable
gds write chip_io_alt
quit -noprompt
EOF
# Generate LEF of chip_io
echo "Generating LEF view of chip_io"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io
select top cell
lef write
quit -noprompt
EOF
# Generate LEF of chip_io_alt
echo "Generating LEF view of chip_io_alt"
magic -d OGL -rcfile ${PDK_ROOT}/${PDK}/libs.tech/magic/${PDK}.magicrc << EOF
load chip_io_alt
select top cell
lef write
quit -noprompt
EOF
# Move all generated files to their proper locations
echo "Moving generated files to destination directories"
mv chip_io.lef ../lef
mv chip_io.def ../def
mv chip_io.gds.gz ../gds
mv chip_io_alt.lef ../lef
mv chip_io_alt.def ../def
mv chip_io_alt.gds.gz ../gds
echo "Done!"