consistent (all metal2 pins the same width and length and all
metal3 pins the same width and length). The PR boundary was
moved back to where it was, 0.28um from the pin ends; that
causes overlap with the padframe but should not be an issue since
the openframe wrapper is manually placed. All pins reach from
0.28um inside the boundary to the bottom of the comment layer
(which is 2um wide). Some remaining pins which were not on a
10nm grid were corrected.
cells are replaced with the base cells. Routing to pins
is instead done in the "gpio_connects" cells while
improving on the original routing (fewer cross-overs,
multiple vias per contact, wider buses for the analog
signals). Made small adjustments to many of the openframe
wrapper pins to keep them all on a 10nm grid. Moved the
connections previously from the "wrapped" GPIO cell back
from the openframe project border, so that the border can
be clear of all blockages. Added the DEF file of the
wrapper (previously only in the openframe example repo)
to the def/ directory. Note: The modified LVS scripts
depend on the gate-level netlists of the frame, which
have been committed in a prior pull request. This pull
request does not conflict with those files.
* update caravel with tying `porb_h_in` with `por_l_in` at the `mgmt_core_wrapper` in the top-level layout:
- `porb_h_in` shouldn't be left floating as it is an input to `clkbuf_16`
* add caravel-eco.gds (same as caravel.gds)
* Fixed caravan top level power routing and updated views for mag, gds and lef
* caravan(rtl): updates
~ typos fix
- remove unused pin in chip_io_alt
+ add caravan_power_routing verilog
* Apply automatic changes to Manifest and README.rst
* ~ update caravan openlane configs to add extra cell references
~ correct placment and cell names of some macro in caravan interactive script
* reharden: caravan
+ add non functional blocks
+ add an initial iteration of caravan
* Apply automatic changes to Manifest and README.rst
* Revert "Fixed caravan top level power routing and updated views for mag, gds and lef"
This reverts commit 70628f748a.
* fixed caravan top level power routing
* reharden: caravan
based on new power routing
~ guard rtl chip_io power pins in the power macro guard
* Apply automatic changes to Manifest and README.rst
* fixed caravan top level power routing
* rehadren: caravan
+ add caravan signal routing to openlane run
~ change rtl to guard power and analog against routing by
openlane by ifndef TOP_ROUTING
~ add pr bounadry for caravan signal routing to fix origin issues
* Apply automatic changes to Manifest and README.rst
* fix power connection in buffering block and regenerate gl
* Apply automatic changes to Manifest and README.rst
* updated views for caravan
* Added extract unique to lvs-gds-cell target. (#313)
* This fixes errors in the top level RTL of caravan that failed to
hook up the buffers through the SoC correctly.
* Apply automatic changes to Manifest and README.rst
* reharden: caravan
~ rtl updated
* fixed caravan mag top level
* updated views for caravan + signoff
* fixed top level cell name
* fix syntax error related to signal initialization place in caravan (#319)
* fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit
* Apply automatic changes to Manifest and README.rst
Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
* Apply automatic changes to Manifest and README.rst
Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu>
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com>
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com>
Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com>
Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
* reharden: caravel
~ shift caravel_clocking due to change in size
~ change the pr boundary of caravel_power_routing mag file
~ regenarate lef of caravel_power_routing
* update pdn for `caravel_clocking` & `digital_pll`
* added script to update and generate the power routing views
* ~ run update_power_routing_views from the caravel root with prboundary
* fix output message
* added power routing lef, mag and gds
* fix update_power_routing_views saving wrong cell name
* reharden: caravel
~ incorperate pdn changes
~ re-extract spefs
* fix caravel_power_routing views
* fix abs path in maglef views
* fix abs path in mag views
add substcut layers in gpio_control_block and mgmt_protect
* generate a new chip_io gds
* regenerate gpio_control_block due to mag and gds not in sync
* reharden: caravel
~ change config to pass clean routing
~ use updated views of macros
* lvs clean views
* add caravel top-level generated sdf for all corners
* fix absolute path for mgmt_core_wrapper
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
~ increase width for more spread decaps
+ add or cells to cell exclude
~ change placement density in accordance to area
~ change padding to allow for space for decaps
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion