Commit Graph

167 Commits

Author SHA1 Message Date
Tim Edwards b3273ca5aa Added the set of missing pins on the 2nd of the two vccd1/vssd1 power
pads to the user project wrapper layout, which were missing, as pointed
out by Marwan.  Regenerated the wrapper DEF file from the updated
layout.
2023-10-01 21:11:33 -04:00
Tim Edwards 495bf5fc5d Stretched all metal3 pins 0.02um toward the center of the chip, so that
the length of pin inside the wrapper boundary is 0.3um, which is the
minimum metal3 layer width, and is required by the routing tool.
2023-09-27 15:07:58 -04:00
Tim Edwards 990f5dffc9 Found one additional minor adjustment was needed to the resetb_h
pin, which was neither 0.28um wide nor completely covered by
metal2.
2023-09-26 17:58:05 -04:00
Tim Edwards 2251bad60f Additional tidying up. All pins on the openframe wrapper are now
consistent (all metal2 pins the same width and length and all
metal3 pins the same width and length).  The PR boundary was
moved back to where it was, 0.28um from the pin ends;  that
causes overlap with the padframe but should not be an issue since
the openframe wrapper is manually placed.  All pins reach from
0.28um inside the boundary to the bottom of the comment layer
(which is 2um wide).  Some remaining pins which were not on a
10nm grid were corrected.
2023-09-26 12:50:50 -04:00
Tim Edwards 31c8f54f24 Modified the openframe padframe so that the GPIO "wrapped"
cells are replaced with the base cells.  Routing to pins
is instead done in the "gpio_connects" cells while
improving on the original routing (fewer cross-overs,
multiple vias per contact, wider buses for the analog
signals).  Made small adjustments to many of the openframe
wrapper pins to keep them all on a 10nm grid.  Moved the
connections previously from the "wrapped" GPIO cell back
from the openframe project border, so that the border can
be clear of all blockages.  Added the DEF file of the
wrapper (previously only in the openframe example repo)
to the def/ directory.  Note:  The modified LVS scripts
depend on the gate-level netlists of the frame, which
have been committed in a prior pull request.  This pull
request does not conflict with those files.
2023-09-25 19:26:09 -04:00
mo-hosni e25997cc3b swapped the left `vssd` and `vccd` rings in `caravan_core` to fix an LVS issue 2023-05-30 22:33:33 -07:00
mo-hosni 0c78dbb954 Revert "reharden `caravan_core` to reduce the long wirelengths"
This reverts commit de16ffc6b9.
2023-05-30 04:35:59 -07:00
mo-hosni de16ffc6b9 reharden `caravan_core` to reduce the long wirelengths 2023-05-30 02:55:16 -07:00
mo-hosni e911784fb7 reharden `caravan_core` to fix LVS and timing issues 2023-05-29 20:07:08 -07:00
mo-hosni 4cbe6d9f0c reharden `caravan` to fix outer pins labeling 2023-05-29 06:47:03 -07:00
mo-hosni aeb0cbc45f reharden `caravan_core` to fix long wires issues 2023-05-29 02:50:45 -07:00
mo-hosni 8de897098d reharden `caravan_core`. Used a lib for the `user_analog_project_wrapper` and fixed DRCs. 2023-05-24 13:53:03 -07:00
mo-hosni fbf53572e1 reharden `housekeeping_alt` 2023-05-24 02:34:43 -07:00
mo-hosni 0c04656e52 add initial views for `caravan` 2023-05-23 03:05:18 -07:00
mo-hosni 26964d5460 add initial physical views for `caravan_core` 2023-05-23 02:16:44 -07:00
mo-hosni 6b5aa27297 harden `housekeeping_alt` that will be integrated in `caravan_core` 2023-05-22 05:38:41 -07:00
mo-hosni 907937b20f reharden `caravel_core` using the updated `gpio_defaults_block` 2023-04-20 23:17:38 -07:00
Passant b9c026b6bf - remove old caravel eco views 2023-04-20 13:55:36 -07:00
mo-hosni 2b8e7b7e2e reharden `caravel_core` to have `user_id_programming` as a macro 2023-04-20 07:26:58 -07:00
mo-hosni 94a68ad071 update the physical views for `caravel_core` as the previous ones had issues in integration 2023-04-11 07:43:05 -07:00
mo-hosni bd20921b90 reharden `caravel_core` using a newer OpenLane version 2023-04-10 07:14:59 -07:00
mo-hosni 4398773262 reharden `housekeeping` using a newer OpenLane version 2023-04-10 07:13:48 -07:00
mo-hosni 58bc32467d reharden `caravel_core` to fix 1 hold violation at the fast nominal corner. 2023-03-27 04:44:22 -07:00
mo-hosni 05795a470f reharden `caravel_core` 2023-03-26 02:56:12 -07:00
mo-hosni f233f2f708 reharden housekeeping to fix setup violations at the ss-max corner on top-level. 2023-03-13 02:53:49 -07:00
mo-hosni 360b7d4cf2 Reharden `caravel_core`. 2023-03-06 01:24:00 -08:00
mo-hosni 3ccbad56dd reharden `caravel_core`. 2023-03-05 00:59:13 -08:00
mo-hosni 725698014a reharden caravel_core after fixing an issue in the RTL of RAM256. 2023-02-28 05:51:06 -08:00
mo-hosni 25e96c9d62 reharden caravel. 2023-02-27 10:39:51 -08:00
mo-hosni 9be48c6a7b implementation of caravel_core. 2023-02-27 10:38:06 -08:00
mo-hosni e560b56db5 reharden spare_logic_block. 2023-02-27 10:37:00 -08:00
mo-hosni 3f29ea49e7 harden mprj_io_buffer. 2023-02-27 10:33:48 -08:00
mo-hosni 5f8e954d95 reharden gpio_logic_high. 2023-02-27 10:29:46 -08:00
mo-hosni 86612d1f08 reharden caravel_clocking. 2023-02-27 10:26:19 -08:00
mo-hosni 8d6cfe6e2b reharden gpio_defaults_block. Changed the power stripes to be on Metal3. 2023-02-27 07:34:33 -08:00
mo-hosni 50a762407b re-implementation of housekeeping. Fixed maximum transition and antenna violations. 2023-02-27 07:30:03 -08:00
mo-hosni b5010be8a7 Update Openlane views 2022-10-27 09:53:45 -07:00
mo-hosni 2d61e593aa Decreased distances from pins to and gates in mgmt_protect 2022-10-27 08:20:57 -07:00
kareem c5c51bdd4a reharden: caravan
~ reimplement after chip_io_alt lef view update
2022-10-22 06:03:44 -07:00
Tim Edwards 0f08073876 Updated the chip_io_alt LEF, DEF, and GDS views after updating
the layout yesterday.
2022-10-22 08:46:18 -04:00
kareem 0be31a26c1 reharden: caravan
~ reimplement after rtl changes
2022-10-22 02:52:02 -07:00
passant5 0c9e3a08fd
update caravel with tying `porb_h_in` with `por_l_in` (#326)
* update caravel with tying `porb_h_in` with `por_l_in` at the `mgmt_core_wrapper` in the top-level layout:
- `porb_h_in` shouldn't be left floating as it is an input to `clkbuf_16`

* add caravel-eco.gds (same as caravel.gds)
2022-10-21 11:52:00 -07:00
Jeff DiCorpo 4192c34f4b
Caravan redesign (#321)
* Fixed caravan top level power routing and updated views for mag, gds and lef

* caravan(rtl): updates

~ typos fix
- remove unused pin in chip_io_alt
+ add caravan_power_routing verilog

* Apply automatic changes to Manifest and README.rst

* ~ update caravan openlane configs to add extra cell references
~ correct placment and cell names of some macro in caravan interactive script

* reharden: caravan

+ add non functional blocks
+ add an initial iteration of caravan

* Apply automatic changes to Manifest and README.rst

* Revert "Fixed caravan top level power routing and updated views for mag, gds and lef"

This reverts commit 70628f748a.

* fixed caravan top level power routing

* reharden: caravan

based on new power routing
~ guard rtl chip_io power pins in the power macro guard

* Apply automatic changes to Manifest and README.rst

* fixed caravan top level power routing

* rehadren: caravan

+ add caravan signal routing to openlane run
~ change rtl to guard power and analog against routing by
openlane by ifndef TOP_ROUTING
~ add pr bounadry for caravan signal routing to fix origin issues

* Apply automatic changes to Manifest and README.rst

* fix power connection in buffering block and regenerate gl

* Apply automatic changes to Manifest and README.rst

* updated views for caravan

* Added extract unique to lvs-gds-cell target. (#313)

* This fixes errors in the top level RTL of caravan that failed to
hook up the buffers through the SoC correctly.

* Apply automatic changes to Manifest and README.rst

* reharden: caravan

~ rtl updated

* fixed caravan mag top level

* updated views for caravan + signoff

* fixed top level cell name

* fix syntax error related to signal initialization place in caravan (#319)

* fix syntax error related to signal initialization place in caravan- fixed in caravel in another commit

* Apply automatic changes to Manifest and README.rst

Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>

* Apply automatic changes to Manifest and README.rst

Co-authored-by: Marwan Abbas <marwaneltoukhy@aucegypt.edu>
Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: kareefardi <kareefardi@users.noreply.github.com>
Co-authored-by: Mitch Bailey <d-m-bailey@users.noreply.github.com>
Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>
Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
Co-authored-by: Marwan Abbas <67271180+marwaneltoukhy@users.noreply.github.com>
Co-authored-by: M0stafaRady <107422726+M0stafaRady@users.noreply.github.com>
Co-authored-by: M0stafaRady <M0stafaRady@users.noreply.github.com>
Co-authored-by: jeffdi <jeffdi@users.noreply.github.com>
2022-10-21 07:37:41 -07:00
Marwan Abbas bbb6bf775c
Caravel redesign new top (#300)
* reharden: caravel

~ shift caravel_clocking due to change in size
~ change the pr boundary of caravel_power_routing mag file
~ regenarate lef of caravel_power_routing

* update pdn for `caravel_clocking` & `digital_pll`

* added script to update and generate the power routing views

* ~ run update_power_routing_views from the caravel root with prboundary

* fix output message

* added power routing lef, mag and gds

* fix update_power_routing_views saving wrong cell name

* reharden: caravel

~ incorperate pdn changes
~ re-extract spefs

* fix caravel_power_routing views

* fix abs path in maglef views

* fix abs path in mag views
add substcut layers in gpio_control_block and mgmt_protect

* generate a new chip_io gds

* regenerate gpio_control_block due to mag and gds not in sync

* reharden: caravel

~ change config to pass clean routing
~ use updated views of macros

* lvs clean views

* add caravel top-level generated sdf for all corners

* fix absolute path for mgmt_core_wrapper

Co-authored-by: kareem <kareem.farid@efabless.com>
Co-authored-by: Bassant Hassan <bassant.hassan@efabless.com>
2022-10-18 17:24:07 -07:00
Marwan Abbas 20e51c8504
Merge pull request #281 from efabless/fix_buffer_cell_for_lvs
Small change to the signal buffer layouts for LVS.
2022-10-18 17:12:49 +02:00
Marwan Abbas 38902bde45
Merge pull request #292 from efabless/caravel-redesign-digital_pll-decaps
reharden: digital_pll
2022-10-18 16:35:49 +02:00
Marwan Abbas 4cbf8ca4f6
Merge pull request #291 from efabless/caravel-redesign-clocking-decaps
reharden: caravel_clocking
2022-10-18 16:35:26 +02:00
kareem 68063ddadc reharden: digital_pll
~ increase width for more spread decaps
+ add or cells to cell exclude
~ change placement density in accordance to area
~ change padding to allow for space for decaps
2022-10-18 07:07:32 -07:00
kareem fdeb6003f3 Merge branch 'caravel_redesign-digital_pll-no-or' into caravel_redesign 2022-10-18 06:31:00 -07:00
kareem 3bd586b50c reharden: caravel_clocking
~ increase height for more spread decap insertion
+ add or cells to cell exclude
~ adjust pdn to have an offset half to pitch
~ change placement density in accordance to area
~ change padding to allow for space for decap insertion
2022-10-18 06:18:30 -07:00