Commit Graph

  • 52e2fed5f4
    Merge pull request #1726 from lnis-uofu/xt_ci tangxifan 2024-06-25 18:31:31 -0700
  • c07e35136b [ci] now use download-artifact v4 tangxifan 2024-06-25 16:46:33 -0700
  • ec1ad94d4a [doc] add syntax about internal drivers tangxifan 2024-06-25 13:06:47 -0700
  • c99178f350 [test] fixed a bug on pin locations tangxifan 2024-06-25 12:34:52 -0700
  • 4640e74e7e [core] code format tangxifan 2024-06-25 12:25:16 -0700
  • 66af73e91e [lib] now accept reset and set in programmable clock network tangxifan 2024-06-25 12:24:46 -0700
  • fbece49047 [core] fixed a bug where unexpected OPINs are added as internal drivers tangxifan 2024-06-25 12:07:19 -0700
  • 2cbb04b90d [test] add a new testcase to validate programmable clock network with internal drivers tangxifan 2024-06-25 11:58:05 -0700
  • 7bcbd8a88b [core] code format tangxifan 2024-06-25 11:44:50 -0700
  • 3b2c13402a [core] syntax tangxifan 2024-06-25 11:44:25 -0700
  • 31d4b4c402 [core] now support add internal drivers to clock tree tangxifan 2024-06-25 11:27:22 -0700
  • 66095322bb
    Merge pull request #1728 from lnis-uofu/patch_update tangxifan 2024-06-25 09:42:34 -0700
  • ea5ab5117c Updated Patch Count github-actions[bot] 2024-06-25 16:36:44 +0000
  • fbfe3218c1
    Merge pull request #1727 from lnis-uofu/dependabot/submodules/yosys-1288166 tangxifan 2024-06-25 09:36:25 -0700
  • 4619e3ea53
    Bump yosys from `6c8ae44` to `1288166` dependabot[bot] 2024-06-25 06:59:40 +0000
  • 272d78eb43 [test] add a new unit test tangxifan 2024-06-24 19:13:36 -0700
  • 22bee35fd1 [lib] mem allocate tangxifan 2024-06-24 18:47:56 -0700
  • 36ef555dda [lib] add example arch for clock arch with internal drivers tangxifan 2024-06-24 18:33:47 -0700
  • 2eda2825b7 [lib] syntax tangxifan 2024-06-24 18:28:42 -0700
  • 0c442f6238 [lib] add syntax to support internal drivers in clock network parsers tangxifan 2024-06-24 17:54:58 -0700
  • 428f5b4803 [ci] now use upload-artifact v4 due to deprecation tangxifan 2024-06-24 15:23:55 -0700
  • dd5c3dc769 [ci] use a new version of cancel-previous-flow due to node16 deprecation tangxifan 2024-06-24 15:17:57 -0700
  • 582efc0501 Merge branch 'master' of github.com:lnis-uofu/OpenFPGA into xt_clkntwk2 tangxifan 2024-06-24 10:42:29 -0700
  • 8f770a6e3c
    Merge pull request #1725 from lnis-uofu/patch_update tangxifan 2024-06-24 10:37:07 -0700
  • a436afcc4f Updated Patch Count github-actions[bot] 2024-06-24 17:21:57 +0000
  • cd680fd21d
    Merge pull request #1724 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-6a4f0ca tangxifan 2024-06-24 10:21:36 -0700
  • 9bdcc27913
    Bump vtr-verilog-to-routing from `2ff460a` to `6a4f0ca` dependabot[bot] 2024-06-24 06:55:52 +0000
  • 253e3e0cba [doc] add new syntax for clock network tangxifan 2024-06-23 17:43:38 -0700
  • 57cb496314
    Merge branch 'master' into openfpga-wire-lut-output tangxifan 2024-06-23 13:07:48 -0700
  • 9bb076d892 [test] fixed a bug on pin mapping of tetbenche tangxifan 2024-06-21 20:29:21 -0700
  • d2053db21c [core] removing the restrictions on only 1 clock tree is supported in programmable clock network tangxifan 2024-06-21 19:00:01 -0700
  • 292f4a9273 [test] fixed a bug where ace is no required tangxifan 2024-06-21 18:43:25 -0700
  • 2193f108ee [core] add debugging messages tangxifan 2024-06-21 18:42:35 -0700
  • c2e759fa70 [arch] fixed some bugs tangxifan 2024-06-21 18:42:29 -0700
  • 7d67b9d5b9 [test] deploy new tests to basic reg tests tangxifan 2024-06-21 18:14:54 -0700
  • 8d7dba2d57 [test] add a new testcase to programmable clock network on supporting reset signals tangxifan 2024-06-21 18:13:37 -0700
  • 3f08b83b3a [core] remove restrictions on 1 clock tree definition tangxifan 2024-06-21 17:12:10 -0700
  • ecd31955b1 [core] code format tangxifan 2024-06-21 17:11:32 -0700
  • 3ddaefc2a2 [lib] syntax tangxifan 2024-06-21 17:02:37 -0700
  • 6c5988575c [test] update clock network testcase tangxifan 2024-06-21 16:59:21 -0700
  • 486cd01c15 [core] now clock graph builder supports two types of switches tangxifan 2024-06-21 16:54:22 -0700
  • 1ab75cf76c [lib] now link clock arch supports tap and driver default switches tangxifan 2024-06-21 16:52:22 -0700
  • 9ccd14bf4d [lib] now default switch of clk ntwk is split to default_tap_switch and default_driver_switch tangxifan 2024-06-21 16:45:05 -0700
  • 4fea194bac
    Merge pull request #1722 from lnis-uofu/patch_update tangxifan 2024-06-20 10:27:18 -0700
  • 1edbdf9f22 Updated Patch Count github-actions[bot] 2024-06-20 17:26:30 +0000
  • 3dab0f19c8
    Merge pull request #1720 from lnis-uofu/dependabot/submodules/yosys-6c8ae44 tangxifan 2024-06-20 10:26:09 -0700
  • edd2aa9fb5
    Merge pull request #1717 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-2ff460a tangxifan 2024-06-20 10:25:58 -0700
  • 2d6c9c3428
    Bump yosys from `74a1dd9` to `6c8ae44` dependabot[bot] 2024-06-20 06:48:40 +0000
  • dc96bf4b08
    Merge branch 'lnis-uofu:master' into openfpga-wire-lut-output chungshien 2024-06-19 09:57:01 -0700
  • 5e3a044b95
    Merge branch 'lnis-uofu:master' into master chungshien 2024-06-19 09:56:18 -0700
  • 6df48c8162
    Bump yosys from `74a1dd9` to `ede3750` dependabot[bot] 2024-06-19 06:23:32 +0000
  • 6ae96d9717
    Bump vtr-verilog-to-routing from `e099206` to `2ff460a` dependabot[bot] 2024-06-19 06:23:30 +0000
  • 077c6ef1b0
    Merge pull request #1716 from lnis-uofu/patch_update tangxifan 2024-06-18 10:17:56 -0700
  • ae3296ca8d Updated Patch Count github-actions[bot] 2024-06-18 17:02:13 +0000
  • 8d4b1bd0be
    Merge pull request #1715 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-e099206 tangxifan 2024-06-18 10:01:50 -0700
  • b4f7fd5f02 Make sure net is valid before setting it as wire LUT output chungshien-chai 2024-06-18 01:18:57 -0700
  • 920b43feaf
    Bump vtr-verilog-to-routing from `6e8ac62` to `e099206` dependabot[bot] 2024-06-18 06:23:44 +0000
  • beb46c994b
    Merge branch 'lnis-uofu:master' into master chungshien 2024-06-17 20:49:39 -0700
  • 0cd48bd427
    Merge pull request #1714 from lnis-uofu/patch_update tangxifan 2024-06-17 09:42:24 -0700
  • 0ee61a895b Updated Patch Count github-actions[bot] 2024-06-17 16:41:06 +0000
  • 1422495783
    Merge pull request #1713 from lnis-uofu/dependabot/submodules/yosys-74a1dd9 tangxifan 2024-06-17 09:40:47 -0700
  • 69fe78d2f9
    Bump yosys from `2fd2b65` to `74a1dd9` dependabot[bot] 2024-06-17 06:09:27 +0000
  • 66baf7e605
    Merge pull request #1712 from lnis-uofu/patch_update tangxifan 2024-06-14 10:13:32 -0700
  • e44facba04 Updated Patch Count github-actions[bot] 2024-06-14 16:50:19 +0000
  • 5cf1723352
    Merge pull request #1711 from lnis-uofu/dependabot/submodules/yosys-2fd2b65 tangxifan 2024-06-14 09:50:01 -0700
  • 269b3051f6
    Bump yosys from `a55e859` to `2fd2b65` dependabot[bot] 2024-06-14 06:54:10 +0000
  • aba9aa6797
    Merge pull request #1709 from lnis-uofu/patch_update tangxifan 2024-06-12 09:36:40 -0700
  • 2364748245 Updated Patch Count github-actions[bot] 2024-06-12 16:35:59 +0000
  • 97c4fd5499
    Merge pull request #1708 from lnis-uofu/dependabot/submodules/yosys-a55e859 tangxifan 2024-06-12 09:35:41 -0700
  • ab7a60cb51
    Bump yosys from `ef90458` to `a55e859` dependabot[bot] 2024-06-12 06:44:29 +0000
  • b4896c4c33
    Merge pull request #1707 from lnis-uofu/patch_update tangxifan 2024-06-11 16:48:16 -0700
  • a3800e066d Updated Patch Count github-actions[bot] 2024-06-11 23:47:00 +0000
  • 62342fc05c
    Merge pull request #1706 from lnis-uofu/xt_ci tangxifan 2024-06-11 16:46:40 -0700
  • 0cdc281828 [core] now use force push tangxifan 2024-06-11 13:56:01 -0700
  • b19e0aec75 [ci] bring back reg tests on master branch and version updater is now triggered automatically on any changes to master branch tangxifan 2024-06-11 13:53:33 -0700
  • 3f9847695a
    Merge pull request #1705 from lnis-uofu/patch_update tangxifan 2024-06-11 10:15:56 -0700
  • c45fb3756d Updated Patch Count github-actions[bot] 2024-06-11 17:15:39 +0000
  • 1b51a8bed5
    Merge pull request #1704 from lnis-uofu/dependabot/submodules/yosys-ef90458 tangxifan 2024-06-11 09:40:48 -0700
  • c1270744c0
    Bump yosys from `9f94ecf` to `ef90458` dependabot[bot] 2024-06-11 06:06:43 +0000
  • 0497d5377f
    Merge pull request #1703 from lnis-uofu/patch_update tangxifan 2024-06-10 20:24:00 -0700
  • 0fbfeda2b0 Updated Patch Count github-actions[bot] 2024-06-11 01:30:25 +0000
  • ab9a67ea49
    Merge pull request #1701 from lnis-uofu/xt_ci tangxifan 2024-06-10 17:03:40 -0700
  • 43056db3c0 Updated Patch Count github-actions[bot] 2024-06-11 00:02:40 +0000
  • c05cc39899 [ci] now enable cancel jobs in progress tangxifan 2024-06-10 12:19:58 -0700
  • 87a07fb111 [doc] add missing links tangxifan 2024-06-10 10:57:27 -0700
  • e6784fdf6c [doc] merge cicd into ci section tangxifan 2024-06-10 10:47:22 -0700
  • 5dcaab98bf [doc] format tangxifan 2024-06-10 10:43:45 -0700
  • 3955c80257 [doc] now add tips/notes to readme. Update broken links tangxifan 2024-06-10 10:42:29 -0700
  • 933de5e09e [ci] revert back to original checkout submodule strategy, as sockpp submodule link is updated in vtr tangxifan 2024-06-10 10:26:06 -0700
  • 1fd09a9fd0
    Merge pull request #1700 from lnis-uofu/dependabot/submodules/yosys-9f94ecf tangxifan 2024-06-10 10:09:32 -0700
  • ef57e87ea3
    Merge pull request #1699 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-6e8ac62 tangxifan 2024-06-10 10:09:19 -0700
  • e027b05dd2
    Bump yosys from `bd28d26` to `9f94ecf` dependabot[bot] 2024-06-10 06:58:04 +0000
  • dc91ebcbac
    Bump vtr-verilog-to-routing from `8ffc583` to `6e8ac62` dependabot[bot] 2024-06-10 06:58:01 +0000
  • 0818a05254
    Merge pull request #1698 from lnis-uofu/patch_update tangxifan 2024-06-09 19:02:35 -0700
  • bf81ace68d Updated Patch Count github-actions[bot] 2024-06-10 00:02:50 +0000
  • 01b7e8ece0
    Merge pull request #1696 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-8ffc583 tangxifan 2024-06-08 22:35:55 -0700
  • d59d5b03a4
    Merge pull request #1695 from lnis-uofu/dependabot/submodules/yosys-bd28d26 tangxifan 2024-06-08 22:35:35 -0700
  • e7b79fb6ca
    Bump vtr-verilog-to-routing from `d1b89e5` to `8ffc583` dependabot[bot] 2024-06-07 06:06:20 +0000
  • 0b2b1eeac4
    Bump yosys from `855ac28` to `bd28d26` dependabot[bot] 2024-06-07 06:06:17 +0000
  • 1da75c1588
    Bump vtr-verilog-to-routing from `d1b89e5` to `82a1860` dependabot[bot] 2024-06-06 06:18:10 +0000