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[core] now clock graph builder supports two types of switches

This commit is contained in:
tangxifan 2024-06-21 16:54:22 -07:00
parent 1ab75cf76c
commit 486cd01c15
1 changed files with 2 additions and 2 deletions
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4
openfpga/src/annotation/append_clock_rr_graph.cpp
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@ -526,7 +526,7 @@ static void add_rr_graph_block_clock_edges(
/* Create edges */
VTR_ASSERT(rr_graph_view.valid_node(des_node));
rr_graph_builder.create_edge(src_node, des_node,
clk_ntwk.default_switch(), false);
clk_ntwk.default_driver_switch(), false);
edge_count++;
}
VTR_LOGV(verbose, "\tWill add %lu edges to other clock nodes\n",
@ -542,7 +542,7 @@ static void add_rr_graph_block_clock_edges(
/* Create edges */
VTR_ASSERT(rr_graph_view.valid_node(des_node));
rr_graph_builder.create_edge(src_node, des_node,
clk_ntwk.default_switch(), false);
clk_ntwk.default_tap_switch(), false);
edge_count++;
}
VTR_LOGV(verbose, "\tWill add %lu edges to other IPIN\n",