From 486cd01c1505823c5696e9dd4078ba9503de54a8 Mon Sep 17 00:00:00 2001 From: tangxifan Date: Fri, 21 Jun 2024 16:54:22 -0700 Subject: [PATCH] [core] now clock graph builder supports two types of switches --- openfpga/src/annotation/append_clock_rr_graph.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openfpga/src/annotation/append_clock_rr_graph.cpp b/openfpga/src/annotation/append_clock_rr_graph.cpp index a52a86ed2..d6d6fe1b7 100644 --- a/openfpga/src/annotation/append_clock_rr_graph.cpp +++ b/openfpga/src/annotation/append_clock_rr_graph.cpp @@ -526,7 +526,7 @@ static void add_rr_graph_block_clock_edges( /* Create edges */ VTR_ASSERT(rr_graph_view.valid_node(des_node)); rr_graph_builder.create_edge(src_node, des_node, - clk_ntwk.default_switch(), false); + clk_ntwk.default_driver_switch(), false); edge_count++; } VTR_LOGV(verbose, "\tWill add %lu edges to other clock nodes\n", @@ -542,7 +542,7 @@ static void add_rr_graph_block_clock_edges( /* Create edges */ VTR_ASSERT(rr_graph_view.valid_node(des_node)); rr_graph_builder.create_edge(src_node, des_node, - clk_ntwk.default_switch(), false); + clk_ntwk.default_tap_switch(), false); edge_count++; } VTR_LOGV(verbose, "\tWill add %lu edges to other IPIN\n",