[test] add a new unit test

2024-06-24 19:13:36 -07:00 · 2024-06-24 19:13:36 -07:00 · 272d78eb43
parent 22bee35fd1
commit 272d78eb43
1 changed files with 4 additions and 0 deletions
--- a/libs/libclkarchopenfpga/test/xml_io_clock_network.cpp
+++ b/libs/libclkarchopenfpga/test/xml_io_clock_network.cpp
@ -22,6 +22,10 @@ int main(int argc, const char** argv) {

  /* Validate before write out */
  if (!clk_ntwk.link()) {
+    VTR_LOG_ERROR("Invalid clock network when linking.\n");
+    exit(1);
+  }
+  if (!clk_ntwk.validate()) {
    VTR_LOG_ERROR("Invalid clock network.\n");
    exit(1);
  }