Commit Graph

224 Commits

Author SHA1 Message Date
chungshien 4365d160ff
Support extracting data that is not affecting fabric bitstream (#1566)
* BRAM preload data - generic way to extract data from design

* Add docs and support special __layout__ case

* Add test

* Fix warning

* Change none-fabric to non-fabric
2024-03-09 17:38:31 -08:00
Victor 39a012b939 Support checking illegal pin constraint (use loc as key and update message format) 2024-03-04 12:41:19 +08:00
Victor d2a8213566 Support checking illegal pin constraint (optimize and add comments) 2024-02-28 11:23:03 +08:00
Victor f4658ee67d Support checking illegal pin constraint (Show design pins) 2024-02-27 16:50:00 +08:00
Victor 3138481df4 Support checking illegal pin constraint 2024-02-27 10:21:16 +08:00
Yitian4Debug 1d0d8c5417
Update read_xml_repack_design_constraints.cpp
code clean up
2023-12-05 10:13:53 -08:00
Yitian4Debug e6c9d22ce9
Update repack_design_constraints.h
code clean up
2023-12-05 10:10:19 -08:00
Yitian4Debug aa51b6d388
Update repack_design_constraints.h 2023-12-05 09:40:25 -08:00
Yitian4Debug 57f3b7af0f
Update repack_design_constraints.h 2023-12-05 09:38:27 -08:00
Yitian4Debug b765410300
Update repack_design_constraints.cpp 2023-12-05 09:37:56 -08:00
Yitian4Debug 7aa882f82c
Update read_xml_repack_design_constraints.cpp 2023-12-05 09:26:05 -08:00
Yitian4Debug 0e243d1c05
Update repack_design_constraints.cpp 2023-12-05 09:17:29 -08:00
Yitian4Debug d0958fc017
Update repack_design_constraints.h 2023-12-05 09:09:45 -08:00
ubuntu a50b007d72 add vtr assert 2023-12-01 03:02:52 -08:00
ubuntu 539d41f3df reformat the code 2023-11-29 17:42:13 -08:00
ubuntu 2511b79bd6 format the code 2023-11-29 02:27:53 -08:00
ubuntu 030f9d8837 changes according to code review 2023-11-29 02:12:07 -08:00
ubuntu d28f024b61 minor change 2023-11-29 01:53:18 -08:00
tangxifan 1aac6681bc
Merge branch 'master' into repack_debug 2023-11-22 10:48:59 -08:00
ubuntu ee392f1b46 add ignore_net to repackdesign constraint 2023-11-21 21:47:03 -08:00
tangxifan 93cbbf2045 [core] code format 2023-10-06 18:20:55 -07:00
tangxifan b07111497c [core] enable options in xml writers 2023-10-06 18:20:17 -07:00
tangxifan 76f446caec [core] fixed a bug 2023-09-25 21:13:11 -07:00
tangxifan 3adf81046a [core] code format 2023-09-25 17:22:26 -07:00
tangxifan 5e269e8bc4 [core] support port merging at grid modules 2023-09-25 17:21:58 -07:00
tangxifan fd99dafad7 [core] code format 2023-09-25 16:51:01 -07:00
tangxifan 96f36a96dd [core] syntax 2023-09-25 16:50:30 -07:00
tangxifan ca715f4c82 [core] developing parser to support subtile port merge 2023-09-25 16:46:34 -07:00
tangxifan 0a94763422 [lib] add module rename assistant 2023-09-22 18:16:01 -07:00
tangxifan 278b8e2409 [lib] fixed a typo which causes outputted module name XMLs carry syntax errors 2023-09-22 17:37:27 -07:00
tangxifan c6175aa514 [core] code format 2023-09-17 22:37:48 -07:00
tangxifan ef97127c63 [core] fixed some bugs in testbenches when renaming top modules 2023-09-17 22:34:00 -07:00
tangxifan 72a3c05747 [core] code format 2023-09-17 13:29:30 -07:00
tangxifan ccd4c1861b [core] developing new command to write module naming rules 2023-09-16 19:37:06 -07:00
tangxifan 37573abc22 [core] code format 2023-09-15 23:32:40 -07:00
tangxifan bc407e5d69 [core] code complete for rename modules 2023-09-15 23:22:31 -07:00
tangxifan 7913e6cc6a [lib] update tests and fixed some bugs 2023-09-15 17:38:51 -07:00
tangxifan b5cf08a3c5 [lib] add testing 2023-09-15 17:15:05 -07:00
tangxifan 74b9f673ec [lib] syntax and add missing api 2023-09-15 17:00:02 -07:00
tangxifan 636647902e [lib] developing io for module name map 2023-09-15 16:53:24 -07:00
tangxifan e5bc936144 [lib] developing io 2023-09-15 16:19:10 -07:00
tangxifan b65dda90c4 [lib] developing naming manager 2023-09-15 16:02:13 -07:00
tangxifan af67b02cca [lib] rename lib to namemanager as a unified library to provide naming support on FPGA modules 2023-09-15 13:51:14 -07:00
tangxifan 3273728bc3 [lib] code format 2023-08-26 18:15:30 -07:00
tangxifan ac5873bac2 [lib] fixed some bugs in message show 2023-08-26 18:12:25 -07:00
tangxifan 97619fc545 [lib] add verbose output option to fabric key assistant 2023-08-26 18:07:08 -07:00
tangxifan cfaae55bda [lib] debugged fabric key assistant 2023-08-26 13:19:18 -07:00
tangxifan adae7392e5 [lib] developing fabric key assistant 2023-08-26 12:54:12 -07:00
tangxifan d3895c3dc0 [core] code format 2023-08-03 17:34:25 -07:00
tangxifan 53050b94ab [core] developing memory group modules in grid modules 2023-08-01 17:50:03 -07:00