riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Update repack_design_constraints.h

This commit is contained in:
Yitian4Debug 2023-12-05 09:09:45 -08:00 committed by GitHub
parent a1169beaf0
commit d0958fc017
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
libs/libpcf/src/base/repack_design_constraints.h
View File

@ -6,7 +6,6 @@
*******************************************************************/
#include <array>
#include <map>
#include <set>
#include <string>
/* Headers from vtrutil library */
#include "vtr_geometry.h"
@ -36,7 +35,7 @@ constexpr const char* REPACK_DESIGN_CONSTRAINT_OPEN_NET = "OPEN";
*******************************************************************/
class RepackDesignConstraints {
public: /* Type of design constraints */
enum e_design_constraint_type { PIN_ASSIGNMENT, NUM_DESIGN_CONSTRAINT_TYPES };
enum e_design_constraint_type { PIN_ASSIGNMENT, IGNORE_NET, NUM_DESIGN_CONSTRAINT_TYPES };
public: /* Types */
typedef vtr::vector<RepackDesignConstraintId,