minor change
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@ -54,9 +54,15 @@ std::string RepackDesignConstraints::net(
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return repack_design_constraint_nets_[repack_design_constraint_id];
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}
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std::map<std::string, std::vector<std::string>>
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RepackDesignConstraints::ignore_net_pin_map() const {
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return ignore_net_pin_map_;
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std::vector<std::string> RepackDesignConstraints::ignore_net_on_pin(
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const std::string& net_name) const {
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std::map<std::string, std::vector<std::string>>::const_iterator it =
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ignore_net_pin_map_.find(net_name);
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if (it != ignore_net_pin_map_.end()) {
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return it->second;
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} else {
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return std::vector<std::string>();
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}
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}
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std::string RepackDesignConstraints::find_constrained_pin_net(
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@ -69,7 +69,7 @@ class RepackDesignConstraints {
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std::string net(
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const RepackDesignConstraintId& repack_design_constraint_id) const;
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std::map<std::string, std::vector<std::string>> ignore_net_pin_map() const;
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std::vector<std::string> ignore_net_on_pin(const std::string& net_name) const;
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/* Find a constrained net */
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std::string find_constrained_pin_net(const std::string& pb_type,
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const openfpga::BasicPort& pin) const;
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@ -49,14 +49,13 @@ bool RepackOption::is_pin_ignore_global_nets(const std::string& pb_type_name,
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bool RepackOption::net_is_specified_to_be_ignored(std::string cluster_net_name,
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std::string pb_type_name,
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const BasicPort& port) const {
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auto result = design_constraints_.ignore_net_pin_map().find(cluster_net_name);
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if (result == design_constraints_.ignore_net_pin_map().end()) {
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auto pin_ctx_to_parse =
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design_constraints_.ignore_net_on_pin(cluster_net_name);
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if (pin_ctx_to_parse.empty()) {
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/* Not found, return false */
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return false;
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} else {
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/* Split the content using a tokenizer */
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auto pin_ctx_to_parse =
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design_constraints_.ignore_net_pin_map()[cluster_net_name];
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for (auto pin_ctx_to_parse_iter : pin_ctx_to_parse) {
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int num_parse_errors_temp = 0;
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StringToken tokenizer(pin_ctx_to_parse_iter);
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