Commit Graph

181 Commits

Author SHA1 Message Date
tangxifan cb0df2c1c6 update doc about technology binding between circuit library and device library 2020-07-15 11:05:33 -06:00
tangxifan 65dfc545c1 update documentation for fabric key 2020-07-07 10:28:29 -06:00
tangxifan 7615db2be6 update documentation for the new fabric key rules 2020-07-06 16:44:21 -06:00
tangxifan ece262f544 remove debug mode in compilation guidelines as we can use release in default now 2020-07-04 19:19:06 -06:00
tangxifan 933801cfa7 update documentation about alias support in fabric key 2020-06-27 15:04:04 -06:00
tangxifan db5397fa75 update tutorial about architecture to synchronize with latest file organization 2020-06-24 10:51:26 -06:00
tangxifan 161d1474c1 keep tutorial updated to the latest regression test organization 2020-06-24 10:36:08 -06:00
tangxifan 8b8d92d186 update documentation for new bitstream file format 2020-06-20 18:59:45 -06:00
tangxifan 91b072d7c5 documentation update on the bitstream file format to synchronize with the latest codes 2020-06-17 11:56:40 -06:00
tangxifan ba38120093 add documentation for fabric key and reorganize command references 2020-06-12 16:15:16 -06:00
tangxifan 1a006f2ddb update documentation for separated XML files 2020-06-11 19:31:16 -06:00
tangxifan b9dd47d465 update documentation about memory bank configuration protocol 2020-06-11 19:31:14 -06:00
tangxifan c00653961e minor format fix in documentation 2020-06-11 19:31:13 -06:00
tangxifan 0931eccbf6 update documentation for the fast configuration options 2020-06-11 19:31:13 -06:00
tangxifan fe2ba7d50a update documentation for standalone configuration protocol 2020-06-11 19:31:13 -06:00
tangxifan de07712a3a update documentation about the frame-based configuration protocol 2020-06-11 19:31:11 -06:00
tangxifan 1150b903a5 add quick start tutorial for architecture modeling 2020-06-11 19:31:09 -06:00
tangxifan 339bf87c43 add missing file 2020-06-11 19:31:09 -06:00
tangxifan aa77ee9af6 add tutorial for full testbench run 2020-06-11 19:31:09 -06:00
tangxifan 35536ee594 renaming design flows in documentation 2020-06-11 19:31:09 -06:00
tangxifan 011ce5cdf6 minor fix on the documentation 2020-06-11 19:31:08 -06:00
tangxifan f079c61bd3 re organize tutorials 2020-06-11 19:31:08 -06:00
tangxifan dcce782a46 update documentation about Verilog testbenches 2020-06-11 19:31:08 -06:00
tangxifan c5a3e44e61 Update Verilog fabric netlist documentation 2020-06-11 19:31:08 -06:00
tangxifan cae7fe0fed minor fix on the manual subtree 2020-06-11 19:31:08 -06:00
tangxifan c27d77a418 clean-up documentation for a shallow hierarchy 2020-06-11 19:31:08 -06:00
tangxifan f6895fcc14 update documentation for new options of Verilog testbench writer 2020-06-11 19:31:07 -06:00
tangxifan c2a81c76e1 update doc for new options 2020-06-11 19:31:07 -06:00
tangxifan f4dd882f0f documentation updated for new command 2020-06-11 19:31:06 -06:00
tangxifan df9cf32b49 update documenation for configuration chain writer 2020-06-11 19:31:06 -06:00
tangxifan a41c8dbcb3 change to use default sphinx build version 2020-06-11 19:31:06 -06:00
Xifan Tang 24934aff86 update documentation on the depth option for fabric hierarchy writer 2020-06-11 19:31:04 -06:00
Xifan Tang 752470c2da update documentation on write hierarchy command and options 2020-06-11 19:31:04 -06:00
Xifan Tang ac378febef update doc about time units in SDC generator 2020-06-11 19:31:03 -06:00
Xifan Tang d18e924a89 Update documentation on new fpga_sdc option 2020-06-11 19:31:03 -06:00
Xifan Tang ecdbdcb592 update documentation on new SDC options 2020-06-11 19:31:02 -06:00
Xifan Tang 52adebacfb update doc for file options in openfpga bitstream 2020-04-21 14:40:53 -06:00
Xifan Tang b4542ea34b minor fix on doc about the global and general purpose port 2020-04-09 17:10:04 -06:00
Xifan Tang d99776b260 update documentation on the global I/O ports 2020-04-08 18:18:53 -06:00
Xifan Tang b9ade3fcb6 documentation update to introduce new features in script mode of OpenFPGA shell 2020-04-08 14:13:28 -06:00
Xifan Tang 55e68896d6 doc update for the support on std cell MUX2 and examples 2020-04-07 12:01:13 -06:00
Xifan Tang 7a4137fdcf doc update for packable XML syntax in VPR 2020-04-06 18:37:05 -06:00
Xifan Tang 1a3a748dd2 update documentation with the support on spypads and global I/O ports 2020-04-05 20:12:28 -06:00
Xifan Tang 6ce0fe4ef2 doc update for FPGA-bitstream to better motivate the different types of bitstream 2020-04-01 12:57:28 -06:00
Xifan Tang fd8248d9dd update documentation: the addon syntax on VPR and configuration protocols 2020-04-01 12:35:52 -06:00
tangxifan 78964ce71c update documentation on the through channel 2020-03-27 11:34:39 -06:00
Xifan Tang b4221e94bb add documentation on the tileable routing and thru channel support 2020-03-25 16:52:42 -06:00
Xifan Tang cb6afea07c update documentation on a new option in FPGA-SDC to constrain zero-delay paths 2020-03-25 16:00:25 -06:00
Xifan Tang 3a74fb7a04 update documentation for the new options 2020-03-25 15:23:21 -06:00
Xifan Tang 7e3a8e5794 typo fixed in fpga-bitstream documentation 2020-03-22 16:27:12 -06:00