update documentation on write hierarchy command and options

This commit is contained in:
Xifan Tang 2020-05-05 15:50:55 -06:00 committed by tangxifan
parent 17c254a370
commit 752470c2da
1 changed files with 13 additions and 0 deletions

View File

@ -102,6 +102,15 @@ Setup OpenFPGA
.. note:: This is a must-run command before launching FPGA-Verilog, FPGA-Bitstream, FPGA-SDC and FPGA-SPICE
.. option:: write_fabric_hierarchy
Write the hierarchy of FPGA fabric graph to a plain-text file
- ``--file`` or ``-f`` Specify the file name to write the hierarchy.
- ``--verbose`` Show verbose log
.. note:: This file is designed for hierarchical PnR flow, which requires the tree of Multiple-Instanced-Blocks (MIBs).
FPGA-Bitstream
~~~~~~~~~~~~~~
@ -182,6 +191,10 @@ FPGA-SDC
- ``--time_unit`` Specify a time unit to be used in SDC files. Acceptable values are string: ``as`` | ``fs`` | ``ps`` | ``ns`` | ``us`` | ``ms`` | ``ks`` | ``Ms``. By default, we will consider second (``s``).
- ``--output_hierarchy`` Output hierarchy of Multiple-Instance-Blocks(MIBs) to plain text file. This is applied to constrain timing for grids, Switch Blocks and Connection Blocks.
.. note:: Valid only when ``compress_routing`` is enabled in ``build_fabric``
- ``--constrain_global_port`` Constrain all the global ports of FPGA fabric.
- ``--constrain_non_clock_global_port`` Constrain all the non-clock global ports as clocks ports of FPGA fabric