update documentation on new SDC options

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Xifan Tang 2020-05-02 14:23:20 -06:00 committed by tangxifan
parent 8695c5ee78
commit ecdbdcb592
1 changed files with 4 additions and 0 deletions

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@ -176,6 +176,8 @@ FPGA-SDC
- ``--file`` or ``-f`` Specify the output directory for SDC files
- ``--flatten_names`` Use flatten names (no wildcards) in SDC files
- ``--constrain_global_port`` Constrain all the global ports of FPGA fabric.
- ``--constrain_non_clock_global_port`` Constrain all the non-clock global ports as clocks ports of FPGA fabric
@ -205,3 +207,5 @@ FPGA-SDC
Write the SDC to run timing analysis for a mapped FPGA fabric
- ``--file`` or ``-f`` Specify the output directory for SDC files
- ``--flatten_names`` Use flatten names (no wildcards) in SDC files